From b665027754e4a050b5c3ea2da999dce8bf3ab710 Mon Sep 17 00:00:00 2001 From: Sylvain Miermont Date: Thu, 12 Dec 2013 15:31:52 +0100 Subject: v1.1.1 - bugfix: fixed some range checks that did not prevent segfaults - test: removed systematic register dump in test_loragw_hal.c - modified Makefiles for easier cross-compilation - added root README and removed TXT extension of other READMEs --- loragw_spi_stress/Makefile | 6 ++-- loragw_spi_stress/README | 68 ++++++++++++++++++++++++++++++++++++++++++++ loragw_spi_stress/README.TXT | 64 ----------------------------------------- 3 files changed, 71 insertions(+), 67 deletions(-) create mode 100644 loragw_spi_stress/README delete mode 100644 loragw_spi_stress/README.TXT (limited to 'loragw_spi_stress') diff --git a/loragw_spi_stress/Makefile b/loragw_spi_stress/Makefile index b19eee9..4006dc3 100644 --- a/loragw_spi_stress/Makefile +++ b/loragw_spi_stress/Makefile @@ -3,7 +3,7 @@ APP_NAME=loragw_spi_stress ### constant symbols - +CROSS_COMPILE= CC=gcc CFLAGS=-O2 -Wall -Wextra -Iinc C99FLAGS=-O2 -Wall -Wextra -std=c99 -Iinc @@ -29,7 +29,7 @@ clean: ### main program compilation and assembly obj/$(APP_NAME).o: src/$(APP_NAME).c - $(CC) -c $(C99FLAGS) -o obj/$(APP_NAME).o $(LGW_INC) src/$(APP_NAME).c $(FLAG_AUX) + $(CROSS_COMPILE)$(CC) -c $(C99FLAGS) -o obj/$(APP_NAME).o $(LGW_INC) src/$(APP_NAME).c $(FLAG_AUX) $(APP_NAME): $(LGW_PATH)/libloragw.a obj/$(APP_NAME).o - $(CC) -o $(APP_NAME) obj/$(APP_NAME).o -L$(LGW_PATH) $(LGW_LNK) + $(CROSS_COMPILE)$(CC) -o $(APP_NAME) obj/$(APP_NAME).o -L$(LGW_PATH) $(LGW_LNK) diff --git a/loragw_spi_stress/README b/loragw_spi_stress/README new file mode 100644 index 0000000..98c4f40 --- /dev/null +++ b/loragw_spi_stress/README @@ -0,0 +1,68 @@ + / _____) _ | | + ( (____ _____ ____ _| |_ _____ ____| |__ + \____ \| ___ | (_ _) ___ |/ ___) _ \ + _____) ) ____| | | || |_| ____( (___| | | | + (______/|_____)_|_|_| \__)_____)\____)_| |_| + ©2013 Semtech-Cycleo + +Lora Gateway SPI stress test +============================= + +1. Introduction +---------------- + +This software is used to check the reliability of the link between the host +platform (on which the program is run) and the Lora concentrator register file +that is the interface through which all interaction with the Lora concentrator +happens. + +2. Dependencies +---------------- + +This program only access the Lora gateway HAL library through its loragw_reg +"named registers" access sub-module. + +It was tested with v1.0.0 of the libloragw library, and should be compatible +with any later version of the library and the hardware, assuming the registers +used for the tests are still present. + +The registers used are: + * LGW_VERSION + * LGW_IMPLICIT_PAYLOAD_LENGHT + * LGW_FSK_REF_PATTERN_LSB + * LGW_RX_DATA_BUF_ADDR + * LGW_RX_DATA_BUF_DATA + +A data buffer accessible through the 2 registers above must be implemented. + +3. Usage +--------- + +The tests run forever or until an error is detected. +Press Ctrl+C to stop the application. + +When an error is detected, diagnosis information are displayed. Please refer to +the source code for more details on what is displayed for diagnosis. + +All tests use pseudo-random data generated by the rand() function. The random +generator is not seeded, and the same sequence of data will be use each time the +program is launched. + +Basically, some random data is written, read back and then compared to the +initial written data. Some "useless" read on others registers might be inserted +to be sure that the data read back is coming from the hardware, and not from the +internal buffer(s) of the software driver(s). + +Test 1 > R/W on a simple 8-bit register + +Test 2 > R/W on a simple 8-bit register with interstitial reads on VERSION + +Test 3 > R/W on a 32-bit register (short SPI bursts access) + +Test 4 > data buffer R/W (long SPI bursts access) + +4. Changelog +------------- + +2013-10-24, v1 +Initial version. diff --git a/loragw_spi_stress/README.TXT b/loragw_spi_stress/README.TXT deleted file mode 100644 index 605fed6..0000000 --- a/loragw_spi_stress/README.TXT +++ /dev/null @@ -1,64 +0,0 @@ - / _____) _ | | - ( (____ _____ ____ _| |_ _____ ____| |__ - \____ \| ___ | (_ _) ___ |/ ___) _ \ - _____) ) ____| | | || |_| ____( (___| | | | - (______/|_____)_|_|_| \__)_____)\____)_| |_| - ©2013 Semtech-Cycleo - -Lora Gateway SPI stress test -============================= - -1. Introduction ----------------- - -This software is used to check the reliability of the link between the host -platform (on which the program is run) and the Lora concentrator register file -that is the interface through which all interaction with the Lora concentrator -happens. - -2. Dependencies ----------------- - -This program only access the Lora gateway HAL library through its loragw_reg -"named registers" access sub-module. - -It was tested with v1.0.0 of the libloragw library, and should be compatible -with any later version of the library and the hardware, assuming the registers -used for the tests are still present. - -The registers used are: -LGW_VERSION -LGW_IMPLICIT_PAYLOAD_LENGHT -LGW_FSK_REF_PATTERN_LSB -LGW_RX_DATA_BUF_ADDR -LGW_RX_DATA_BUF_DATA -A data buffer accessible through the 2 registers above must be implemented. - -3. Usage ---------- - -The tests run forever or until an error is detected. -Press Ctrl+C to stop the application. - -When an error is detected, diagnosis information are displayed. Please refer to -the source code for more details on what is displayed for diagnosis. - -All tests use pseudo-random data generated by the rand() function. The random -generator is not seeded, and the same sequence of data will be use each time the -program is launched. - -Basically, some random data is written, read back and then compared to the -initial written data. Some "useless" read on others registers might be inserted -to be sure that the data read back is coming from the hardware, and not from the -internal buffer(s) of the software driver(s). - -Test 1 > R/W on a simple 8-bit register -Test 2 > R/W on a simple 8-bit register with interstitial reads on VERSION -Test 3 > R/W on a 32-bit register (short SPI bursts access) -Test 4 > data buffer R/W (long SPI bursts access) - -4. Changelog -------------- - -2013-10-24, v1 -Initial version. -- cgit v1.2.3