diff options
Diffstat (limited to 'libloragw')
| -rw-r--r-- | libloragw/Makefile | 19 | ||||
| -rw-r--r-- | libloragw/inc/loragw_hal.h | 32 | ||||
| -rw-r--r-- | libloragw/inc/loragw_reg.h | 3 | ||||
| -rw-r--r-- | libloragw/library.cfg | 5 | ||||
| -rw-r--r-- | libloragw/src/agc_fw.var | 328 | ||||
| -rw-r--r-- | libloragw/src/cal_fw.var | 720 | ||||
| -rw-r--r-- | libloragw/src/loragw_hal.c | 162 | ||||
| -rw-r--r-- | libloragw/src/loragw_reg.c | 3 | ||||
| -rw-r--r-- | libloragw/tst/test_loragw_hal.c | 4 |
9 files changed, 724 insertions, 552 deletions
diff --git a/libloragw/Makefile b/libloragw/Makefile index f6ba783..2b2090e 100644 --- a/libloragw/Makefile +++ b/libloragw/Makefile @@ -74,6 +74,13 @@ else ifeq ($(CFG_BAND),eu433) else $(error The selected radio(s) cannot work in the selected band.) endif +else ifeq ($(CFG_BAND),cn780) + ifeq ($(CFG_RADIO),sx1257) + CFG_BAND_MSG := China 780 MHz band + CFG_BAND_OPT := CFG_BAND_780 + else + $(error The selected radio(s) cannot work in the selected band.) + endif else $(warning [Warning] No frequency band selected, full radio capability assumed.) CFG_BAND_MSG := Full range supported by the radio(s) @@ -92,6 +99,18 @@ else ifeq ($(CFG_BRD),ref_1301_433) else ifeq ($(CFG_BRD),kerlink_868) CFG_BRD_MSG := Kerlink LoRa 868MHz gateway CFG_BRD_OPT := CFG_BRD_KERLINK868 +else ifeq ($(CFG_BRD),kerlink_433) + CFG_BRD_MSG := Kerlink LoRa 433MHz gateway + CFG_BRD_OPT := CFG_BRD_KERLINK433 +else ifeq ($(CFG_BRD),cisco_433) + CFG_BRD_MSG := Cisco LoRa 433MHz gateway + CFG_BRD_OPT := CFG_BRD_CISCO433 +else ifeq ($(CFG_BRD),cisco_470) + CFG_BRD_MSG := Cisco LoRa 470MHz gateway + CFG_BRD_OPT := CFG_BRD_CISCO470 +else ifeq ($(CFG_BRD),cisco_780) + CFG_BRD_MSG := Cisco LoRa 780MHz gateway + CFG_BRD_OPT := CFG_BRD_CISCO780 else $(info [Info] No specific board selected.) CFG_BRD_MSG := None diff --git a/libloragw/inc/loragw_hal.h b/libloragw/inc/loragw_hal.h index 187fca3..1ddbd0f 100644 --- a/libloragw/inc/loragw_hal.h +++ b/libloragw/inc/loragw_hal.h @@ -56,9 +56,9 @@ Maintainer: Sylvain Miermont /* to use array parameters, declare a local const and use 'rf_chain' as index */ #if (CFG_BAND_FULL == 1) #if (CFG_RADIO_1257 == 1) - #define LGW_RF_RX_LOWFREQ { 862000000, 862000000} /* lower limit of the usable band in RX for each radio */ + #define LGW_RF_RX_LOWFREQ { 778000000, 778000000} /* lower limit of the usable band in RX for each radio */ #define LGW_RF_RX_UPFREQ {1020000000,1020000000} /* upper limit of the usable band in RX for each radio */ - #define LGW_RF_TX_LOWFREQ { 862000000, 862000000} /* lower limit of the usable band in TX for each radio */ + #define LGW_RF_TX_LOWFREQ { 778000000, 778000000} /* lower limit of the usable band in TX for each radio */ #define LGW_RF_TX_UPFREQ {1020000000,1020000000} /* upper limit of the usable band in TX for each radio */ #elif (CFG_RADIO_1255 == 1) #define LGW_RF_RX_LOWFREQ { 400000000, 400000000} @@ -86,6 +86,11 @@ Maintainer: Sylvain Miermont #define LGW_RF_RX_UPFREQ { 434790000, 434790000} #define LGW_RF_TX_LOWFREQ { 433050000, 433050000} #define LGW_RF_TX_UPFREQ { 434790000, 434790000} +#elif (CFG_BAND_780 == 1) + #define LGW_RF_RX_LOWFREQ { 779000000, 779000000} + #define LGW_RF_RX_UPFREQ { 787000000, 787000000} + #define LGW_RF_TX_LOWFREQ { 779000000, 779000000} + #define LGW_RF_TX_UPFREQ { 787000000, 787000000} #endif /* type of if_chain + modem */ @@ -136,9 +141,12 @@ Maintainer: Sylvain Miermont #if (CFG_BRD_NANO868 == 1) #define LGW_RF_TX_ENABLE { true, true} /* both radio A and B are usable in TX */ #define LGW_RF_CLKOUT { true, true} /* both radios have clkout enabled */ -#elif ((CFG_BRD_1301REF868 == 1) || (CFG_BRD_1301REF433 == 1) || (CFG_BRD_KERLINK868 == 1)) +#elif ((CFG_BRD_1301REF868 == 1) || (CFG_BRD_1301REF433 == 1) || (CFG_BRD_KERLINK868 == 1) || (CFG_BRD_KERLINK433 == 1)) #define LGW_RF_TX_ENABLE { true,false} /* radio B TX output is disconnected */ #define LGW_RF_CLKOUT {false, true} /* radio A clkout disabled for spur optimization */ +#elif ((CFG_BRD_CISCO433 == 1) || (CFG_BRD_CISCO470 == 1) || (CFG_BRD_CISCO780 == 1)) + #define LGW_RF_TX_ENABLE { true,false} /* radio B TX output is disconnected */ + #define LGW_RF_CLKOUT { true, true} /* Do not know */ /* === ADD CUSTOMIZATION FOR YOUR OWN BOARD HERE === #elif (CFG_BRD_MYBOARD == 1) */ @@ -237,11 +245,13 @@ struct lgw_conf_rxrf_s { @brief Configuration structure for an IF chain */ struct lgw_conf_rxif_s { - bool enable; /*!> enable or disable that IF chain */ - uint8_t rf_chain; /*!> to which RF chain is that IF chain associated */ - int32_t freq_hz; /*!> center frequ of the IF chain, relative to RF chain frequency */ - uint8_t bandwidth; /*!> RX bandwidth, 0 for default */ - uint32_t datarate; /*!> RX datarate, 0 for default */ + bool enable; /*!> enable or disable that IF chain */ + uint8_t rf_chain; /*!> to which RF chain is that IF chain associated */ + int32_t freq_hz; /*!> center frequ of the IF chain, relative to RF chain frequency */ + uint8_t bandwidth; /*!> RX bandwidth, 0 for default */ + uint32_t datarate; /*!> RX datarate, 0 for default */ + uint8_t sync_word_size; /*!> size of FSK sync word (number of bytes, 0 for default) */ + uint64_t sync_word; /*!> FSK sync word (ALIGN RIGHT, eg. 0xC194C1) */ }; /** @@ -345,6 +355,12 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data); int lgw_status(uint8_t select, uint8_t *code); /** +@brief Abort a currently scheduled or ongoing TX +@return LGW_HAL_ERROR id the operation failed, LGW_HAL_SUCCESS else +*/ +int lgw_abort_tx(void); + +/** @brief Return value of internal counter when latest event (eg GPS pulse) was captured @param trig_cnt_us pointer to receive timestamp value @return LGW_HAL_ERROR id the operation failed, LGW_HAL_SUCCESS else diff --git a/libloragw/inc/loragw_reg.h b/libloragw/inc/loragw_reg.h index 1c6e9e7..49a03c9 100644 --- a/libloragw/inc/loragw_reg.h +++ b/libloragw/inc/loragw_reg.h @@ -366,8 +366,9 @@ this file is autogenerated from registers description #define LGW_DATA_MNGT_CPT_FRAME_ALLOCATED 322 #define LGW_DATA_MNGT_CPT_FRAME_FINISHED 323 #define LGW_DATA_MNGT_CPT_FRAME_READEN 324 +#define LGW_TX_TRIG_ALL 325 -#define LGW_TOTALREGS 325 +#define LGW_TOTALREGS 326 /* -------------------------------------------------------------------------- */ /* --- PUBLIC FUNCTIONS PROTOTYPES ------------------------------------------ */ diff --git a/libloragw/library.cfg b/libloragw/library.cfg index 1db5195..52ca305 100644 --- a/libloragw/library.cfg +++ b/libloragw/library.cfg @@ -29,6 +29,7 @@ CFG_RADIO= sx1257 # us915 FCC 915 MHz band # cn470 China 470 MHz band # eu433 ETSI 433 MHz band +# cn780 China 780 MHz band CFG_BAND= eu868 @@ -41,6 +42,10 @@ CFG_BAND= eu868 # ref_1301_868 SX1301 reference board with SX1257 radios, 868 MHz filters # ref_1301_433 SX1301 reference board with SX1255 radios, 433 MHz filters # kerlink_868 Kerlink LoRa 868MHz gateway +# kerlink_433 Kerlink LoRa 433MHz gateway +# cisco_433 Cisco LoRa 433MHz gateway +# cisco_470 Cisco LoRa 470MHz gateway +# cisco_780 Cisco LoRa 780MHz gateway # Keep empty for no calibration parameters (neutral values will be used). CFG_BRD= ref_1301_868 diff --git a/libloragw/src/agc_fw.var b/libloragw/src/agc_fw.var index 45955f7..4c3f17f 100644 --- a/libloragw/src/agc_fw.var +++ b/libloragw/src/agc_fw.var @@ -14,14 +14,170 @@ Maintainer: Matthieu Leurent */ static uint8_t agc_firmware[MCU_AGC_FW_BYTE] = { -0x8A, 0x51, 0x03, 0xAD, 0x00, 0xB0, 0x8A, 0xC0, 0x04, 0x88, 0x84, 0x0A, 0x82, 0x47, 0x00, 0xF4, -0x00, 0xF4, 0x00, 0xF4, 0x00, 0xF4, 0x00, 0xF4, 0x00, 0xF4, 0x02, 0x34, 0x04, 0x34, 0x05, 0x74, -0x06, 0x74, 0x07, 0xB4, 0x08, 0x34, 0x09, 0x74, 0x0A, 0x74, 0x0A, 0x74, 0x0B, 0xB4, 0x0B, 0xB4, -0x0C, 0x74, 0x0D, 0xB4, 0x0D, 0xB4, 0x0E, 0xB4, 0x0E, 0xB4, 0x0E, 0xB4, 0x0F, 0xF4, 0x0F, 0xF4, -0x00, 0xF4, 0x06, 0x74, 0x0C, 0x74, 0x12, 0x74, 0x18, 0x74, 0x1E, 0xF4, 0x24, 0x74, 0x2A, 0xB4, -0x30, 0x74, 0x36, 0xF4, 0x01, 0x34, 0x01, 0x34, 0x01, 0x34, 0x02, 0x34, 0x03, 0x74, 0x04, 0x34, -0x05, 0x74, 0x05, 0x74, 0x06, 0x74, 0x06, 0x74, 0x0F, 0xF4, 0x0C, 0x74, 0x09, 0x74, 0x09, 0x74, -0x09, 0x74, 0x0C, 0x74, 0x0F, 0xF4, 0x0C, 0x74, 0x0F, 0xF4, 0x0C, 0x74, 0xFF, 0xBF, 0xFF, 0xBF, +0x8A, 0x51, 0x11, 0x28, 0xFF, 0xBF, 0xFF, 0xBF, 0x80, 0x40, 0x03, 0x4E, 0x83, 0x52, 0x03, 0x53, +0xAC, 0x00, 0x04, 0x88, 0xAD, 0x40, 0x0A, 0xC8, 0xAE, 0x40, 0x01, 0x88, 0xAF, 0x80, 0x8A, 0x51, +0x13, 0x68, 0x8A, 0x51, 0xCB, 0x2C, 0x8B, 0xDC, 0x1C, 0x68, 0x9E, 0xA0, 0x8A, 0x51, 0x29, 0x20, +0x40, 0xF0, 0x9B, 0x40, 0x04, 0xF0, 0x9E, 0x40, 0x10, 0xF0, 0x8B, 0x00, 0x2F, 0x88, 0x81, 0x80, +0x2E, 0x48, 0x8A, 0xC0, 0x2D, 0x48, 0x84, 0x80, 0x2C, 0x8E, 0x83, 0xC0, 0x80, 0x0E, 0x00, 0xCE, +0x09, 0x80, 0x95, 0x41, 0x96, 0x41, 0x97, 0x81, 0x98, 0x01, 0x99, 0x41, 0x9A, 0x41, 0x9B, 0x81, +0x9C, 0x41, 0x20, 0xF0, 0x9B, 0x40, 0x02, 0xF0, 0x9E, 0x40, 0x19, 0x54, 0x19, 0x95, 0x8B, 0x41, +0xD6, 0x81, 0x02, 0xF0, 0x56, 0x42, 0x03, 0x18, 0x5D, 0xE8, 0x56, 0x48, 0x53, 0x7E, 0x84, 0x80, +0x83, 0x93, 0x80, 0x81, 0x56, 0x48, 0x5F, 0xFE, 0x84, 0x80, 0x07, 0x70, 0x80, 0x40, 0x56, 0x48, +0x73, 0xA0, 0x8A, 0x51, 0x56, 0x48, 0x5F, 0xFE, 0x84, 0x80, 0x00, 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0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, @@ -169,162 +325,6 @@ static uint8_t agc_firmware[MCU_AGC_FW_BYTE] = { 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, -0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0x64, 0xC0, 0x80, 0x81, -0x84, 0x0A, 0x04, 0xC6, 0x03, 0x59, 0x00, 0xF4, 0x04, 0xC6, 0xDF, 0xAC, 0xB8, 0x00, 0xB7, 0xC1, -0x36, 0x48, 0x38, 0x58, 0xB7, 0x47, 0x03, 0xD0, 0xB6, 0x0D, 0x03, 0xD0, 0xB8, 0x8C, 0xB8, 0x48, -0x03, 0x9D, 0xE8, 0xEC, 0x37, 0x88, 0x08, 0x40, 0x35, 0x48, 0xB7, 0x80, 0x34, 0x08, 0xB6, 0x40, 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0xBF, 0xFF, 0xBF, 0xFF, 0xBF, diff --git a/libloragw/src/cal_fw.var b/libloragw/src/cal_fw.var index e1aa570..43b4c40 100644 --- a/libloragw/src/cal_fw.var +++ b/libloragw/src/cal_fw.var @@ -14,285 +14,274 @@ Maintainer: Matthieu Leurent */ static uint8_t cal_firmware[MCU_AGC_FW_BYTE] = { -0x8A, 0x51, 0xB7, 0x28, 0x00, 0xB0, 0x8A, 0xC0, 0x04, 0x88, 0x84, 0x0A, 0x82, 0x47, 0x00, 0xF4, -0x18, 0x74, 0x1C, 0xB4, 0x1E, 0xF4, 0x20, 0x34, 0x22, 0x74, 0x23, 0xB4, 0x24, 0x74, 0x25, 0xB4, -0x26, 0xB4, 0x27, 0xF4, 0x28, 0x74, 0x28, 0x74, 0x29, 0xB4, 0x2A, 0xB4, 0x2A, 0xB4, 0x2B, 0xF4, -0x2B, 0xF4, 0x2C, 0xB4, 0x2C, 0xB4, 0x2D, 0xF4, 0x2D, 0xF4, 0x2D, 0xF4, 0x2E, 0xF4, 0x2E, 0xF4, -0x2E, 0xF4, 0x2F, 0x34, 0x2F, 0x34, 0x2F, 0x34, 0x30, 0x74, 0x30, 0x74, 0x00, 0xF4, 0x00, 0xF4, -0x06, 0x74, 0x0A, 0x74, 0x0C, 0x74, 0x0E, 0xB4, 0x10, 0x34, 0x11, 0x74, 0x12, 0x74, 0x13, 0xB4, -0x14, 0x74, 0x15, 0xB4, 0x16, 0xB4, 0x16, 0xB4, 0x17, 0xF4, 0x18, 0x74, 0x02, 0x34, 0x02, 0x34, -0x03, 0x74, 0x04, 0x34, 0x05, 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0x29, 0xB4, 0x2A, 0xB4, 0x2A, 0xB4, 0x2B, 0xF4, 0x2B, 0xF4, 0x2C, 0xB4, +0x2C, 0xB4, 0x2D, 0xF4, 0x2D, 0xF4, 0x2D, 0xF4, 0x2E, 0xF4, 0x2E, 0xF4, 0x2E, 0xF4, 0x2F, 0x34, +0x2F, 0x34, 0x2F, 0x34, 0x30, 0x74, 0x30, 0x74, 0x00, 0xF4, 0x00, 0xF4, 0x06, 0x74, 0x0A, 0x74, +0x0C, 0x74, 0x0E, 0xB4, 0x10, 0x34, 0x11, 0x74, 0x12, 0x74, 0x13, 0xB4, 0x14, 0x74, 0x15, 0xB4, +0x16, 0xB4, 0x16, 0xB4, 0x17, 0xF4, 0x18, 0x74, 0x0F, 0xF4, 0x0C, 0x74, 0x09, 0x74, 0x09, 0x74, +0x09, 0x74, 0x0C, 0x74, 0x0F, 0xF4, 0x0C, 0x74, 0x0F, 0xF4, 0x0C, 0x74, 0x01, 0x34, 0x01, 0x34, +0x01, 0x34, 0x02, 0x34, 0x03, 0x74, 0x04, 0x34, 0x05, 0x74, 0x05, 0x74, 0x06, 0x74, 0x06, 0x74, +0x02, 0x34, 0x02, 0x34, 0x03, 0x74, 0x04, 0x34, 0x05, 0x74, 0x06, 0x74, 0x07, 0xB4, 0x40, 0x34, +0x20, 0x34, 0x10, 0x34, 0x08, 0x34, 0x04, 0x34, 0x02, 0x34, 0x01, 0x34, 0x06, 0x74, 0x06, 0x74, +0x07, 0xB4, 0x07, 0xB4, 0x07, 0xB4, 0x10, 0x34, 0x08, 0x34, 0x04, 0x34, 0x02, 0x34, 0x01, 0x34, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, @@ -438,92 +427,103 @@ static uint8_t cal_firmware[MCU_AGC_FW_BYTE] = { 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, -0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xB4, 0x00, -0x01, 0xF0, 0xDC, 0x40, 0x31, 0x08, 0xFC, 0x65, 0x8A, 0x95, 0x34, 0x08, 0x03, 0x59, 0xCE, 0x6D, -0x31, 0x08, 0xDE, 0xFE, 0x84, 0x80, 0x00, 0x48, 0xB2, 0x00, 0x31, 0x08, 0x5A, 0x7E, 0x84, 0x80, -0x32, 0x08, 0x80, 0x40, 0x6E, 0x9F, 0x62, 0xED, 0x31, 0x08, 0x54, 0x3E, 0x84, 0x80, 0x00, 0x48, -0x28, 0xFE, 0x67, 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FIR taps (default 2) */ #define SX125x_RX_LNA_GAIN 1 /* 1 to 6, 1 highest gain */ #define SX125x_RX_BB_GAIN 12 /* 0 to 15 , 15 highest gain */ #define SX125x_LNA_ZIN 1 /* 0:50, 1:200 Ohms (default 1) */ @@ -108,13 +108,21 @@ F_register(24bit) = F_rf (Hz) / F_step(Hz) /* Board-specific RSSI calibration constants */ #if (CFG_BRD_NANO868 == 1) - #define RSSI_BOARD_OFFSET 176 + #define RSSI_BOARD_OFFSET 176.0 #elif (CFG_BRD_1301REF868 == 1) - #define RSSI_BOARD_OFFSET 169.5 + #define RSSI_BOARD_OFFSET 166.0 #elif (CFG_BRD_KERLINK868 == 1) - #define RSSI_BOARD_OFFSET 167 + #define RSSI_BOARD_OFFSET 165.0 #elif (CFG_BRD_1301REF433 == 1) - #define RSSI_BOARD_OFFSET 176 + #define RSSI_BOARD_OFFSET 176.5 +#elif (CFG_BRD_KERLINK433 == 1) + #define RSSI_BOARD_OFFSET 178.0 +#elif (CFG_BRD_CISCO433 == 1) + #define RSSI_BOARD_OFFSET 175.5 +#elif (CFG_BRD_CISCO470 == 1) + #define RSSI_BOARD_OFFSET 173.5 +#elif (CFG_BRD_CISCO780 == 1) + #define RSSI_BOARD_OFFSET 168.0 /* === ADD CUSTOMIZATION FOR YOUR OWN BOARD HERE === #elif (CFG_BRD_MYBOARD == 1) */ @@ -250,6 +258,86 @@ typedef struct { { 3, 3, 13, 23},\ { 3, 3, 15, 24},\ }; /* calibrated */ +#elif (CFG_BRD_KERLINK433 == 1) + #define CUSTOM_TX_POW_TABLE 1 + const tx_pow_t tx_pow_table[TX_POW_LUT_SIZE] = {\ + { 0, 3, 8, -6},\ + { 0, 3, 11, 0},\ + { 0, 3, 14, 3},\ + { 1, 3, 9, 6},\ + { 1, 3, 10, 8},\ + { 1, 3, 11, 10},\ + { 1, 3, 12, 11},\ + { 1, 3, 13, 12},\ + { 1, 3, 14, 13},\ + { 1, 3, 15, 14},\ + { 2, 3, 11, 20},\ + { 2, 3, 12, 21},\ + { 3, 3, 8, 22},\ + { 3, 3, 9, 24},\ + { 3, 3, 10, 25},\ + { 3, 3, 12, 26},\ + }; /* calibrated */ +#elif (CFG_BRD_CISCO433 == 1) + #define CUSTOM_TX_POW_TABLE 1 + const tx_pow_t tx_pow_table[TX_POW_LUT_SIZE] = {\ + { 0, 3, 8, -7},\ + { 0, 3, 10, -3},\ + { 0, 3, 12, 0},\ + { 1, 3, 8, 4},\ + { 1, 3, 10, 7},\ + { 1, 3, 11, 8},\ + { 1, 3, 12, 9},\ + { 2, 3, 8, 11},\ + { 2, 3, 9, 14},\ + { 2, 3, 10, 15},\ + { 2, 3, 11, 17},\ + { 2, 3, 12, 18},\ + { 3, 3, 8, 20},\ + { 3, 3, 9, 22},\ + { 3, 3, 10, 23},\ + { 3, 3, 11, 24},\ + }; /* calibrated */ +#elif (CFG_BRD_CISCO470 == 1) + #define CUSTOM_TX_POW_TABLE 1 + const tx_pow_t tx_pow_table[TX_POW_LUT_SIZE] = {\ + { 0, 3, 9, 0},\ + { 0, 3, 13, 4},\ + { 1, 3, 8, 8},\ + { 1, 3, 9, 10},\ + { 1, 3, 10, 11},\ + { 1, 3, 11, 12},\ + { 1, 3, 12, 13},\ + { 1, 3, 13, 14},\ + { 1, 3, 14, 15},\ + { 2, 3, 8, 16},\ + { 2, 3, 9, 18},\ + { 2, 3, 10, 20},\ + { 2, 3, 11, 21},\ + { 2, 3, 13, 22},\ + { 3, 3, 9, 23},\ + { 3, 3, 11, 24},\ + }; /* calibrated */ +#elif (CFG_BRD_CISCO780 == 1) + #define CUSTOM_TX_POW_TABLE 1 + const tx_pow_t tx_pow_table[TX_POW_LUT_SIZE] = {\ + { 0, 3, 8, -12},\ + { 0, 3, 11, -6},\ + { 0, 3, 14, -3},\ + { 1, 3, 9, 0},\ + { 1, 3, 11, 3},\ + { 1, 3, 13, 6},\ + { 2, 3, 10, 8},\ + { 2, 3, 11, 10},\ + { 2, 3, 12, 12},\ + { 2, 3, 13, 14},\ + { 2, 3, 15, 16},\ + { 3, 3, 10, 18},\ + { 3, 3, 11, 20},\ + { 3, 3, 12, 22},\ + { 3, 3, 14, 24},\ + { 3, 3, 15, 25},\ + }; /* calibrated */ /* === ADD CUSTOMIZATION FOR YOUR OWN BOARD HERE === #elif (CFG_BRD_MYBOARD == 1) */ @@ -311,6 +399,8 @@ typedef struct { #define CFG_BAND_STR "cn470" #elif (CFG_BAND_433 == 1) #define CFG_BAND_STR "eu433" +#elif (CFG_BAND_780 == 1) + #define CFG_BAND_STR "cn780" #else #define CFG_BAND_STR "band?" #endif @@ -323,6 +413,14 @@ typedef struct { #define CFG_BRD_STR "ref_1301_433" #elif (CFG_BRD_KERLINK868 == 1) #define CFG_BRD_STR "kerlink_868" +#elif (CFG_BRD_KERLINK433 == 1) + #define CFG_BRD_STR "kerlink_433" +#elif (CFG_BRD_CISCO433 == 1) + #define CFG_BRD_STR "cisco_433" +#elif (CFG_BRD_CISCO470 == 1) + #define CFG_BRD_STR "cisco_470" +#elif (CFG_BRD_CISCO780 == 1) + #define CFG_BRD_STR "cisco_780" /* === ADD CUSTOMIZATION FOR YOUR OWN BOARD HERE === #elif (CFG_BRD_MYBOARD == 1) */ @@ -376,6 +474,8 @@ static bool lora_rx_ppm_offset; static uint8_t fsk_rx_bw; /* bandwidth setting of FSK modem */ static uint32_t fsk_rx_dr; /* FSK modem datarate in bauds */ +static uint8_t fsk_sync_word_size = 3; /* default number of bytes for FSK sync word */ +static uint64_t fsk_sync_word= 0xC194C1; /* default FSK sync word (ALIGNED RIGHT, MSbit first) */ /* TX I/Q imbalance coefficients for mixer gain = 8 to 15 */ static int8_t cal_offset_a_i[8]; /* TX I offset for radio A */ @@ -691,13 +791,10 @@ void lgw_constant_adjust(void) { /* FSK demodulator setup */ lgw_reg_w(LGW_FSK_RSSI_LENGTH,4); /* default 0 */ lgw_reg_w(LGW_FSK_PKT_MODE,1); /* variable length, default 0 */ - lgw_reg_w(LGW_FSK_PSIZE,2); /* pattern size-1, default 0 */ lgw_reg_w(LGW_FSK_CRC_EN,1); /* default 0 */ lgw_reg_w(LGW_FSK_DCFREE_ENC,2); /* default 0 */ // lgw_reg_w(LGW_FSK_CRC_IBM,0); /* default 0 */ lgw_reg_w(LGW_FSK_ERROR_OSR_TOL,10); /* default 0 */ - lgw_reg_w(LGW_FSK_REF_PATTERN_LSB,0x01010101); /* default 0 */ - lgw_reg_w(LGW_FSK_REF_PATTERN_MSB,0xC194C101); /* default 0 */ lgw_reg_w(LGW_FSK_PKT_LENGTH,255); /* max packet length in variable length mode */ // lgw_reg_w(LGW_FSK_NODE_ADRS,0); /* default 0 */ // lgw_reg_w(LGW_FSK_BROADCAST,0); /* default 0 */ @@ -721,7 +818,6 @@ void lgw_constant_adjust(void) { /* TX FSK */ // lgw_reg_w(LGW_FSK_TX_GAUSSIAN_EN,1); /* default 1 */ lgw_reg_w(LGW_FSK_TX_GAUSSIAN_SELECT_BT,2); /* Gaussian filter always on TX, default 0 */ - lgw_reg_w(LGW_FSK_TX_PSIZE,2); /* default 0 */ // lgw_reg_w(LGW_FSK_TX_PATTERN_EN,1); /* default 1 */ // lgw_reg_w(LGW_FSK_TX_PREAMBLE_SEQ,0); /* default 0 */ @@ -766,6 +862,7 @@ int lgw_rxrf_setconf(uint8_t rf_chain, struct lgw_conf_rxrf_s conf) { /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ int lgw_rxif_setconf(uint8_t if_chain, struct lgw_conf_rxif_s conf) { + /* check if the concentrator is running */ if (lgw_is_started == true) { DEBUG_MSG("ERROR: CONCENTRATOR IS RUNNING, STOP IT BEFORE TOUCHING CONFIGURATION\n"); @@ -887,7 +984,11 @@ int lgw_rxif_setconf(uint8_t if_chain, struct lgw_conf_rxif_s conf) { if_freq[if_chain] = conf.freq_hz; fsk_rx_bw = conf.bandwidth; fsk_rx_dr = conf.datarate; - DEBUG_PRINTF("Note: FSK if_chain %d configuration; en:%d freq:%d bw:%d dr:%d (%d real dr)\n", if_chain, if_enable[if_chain], if_freq[if_chain], fsk_rx_bw, fsk_rx_dr, LGW_XTAL_FREQU/(LGW_XTAL_FREQU/fsk_rx_dr)); + if (conf.sync_word > 0) { + fsk_sync_word_size = conf.sync_word_size; + fsk_sync_word = conf.sync_word; + } + DEBUG_PRINTF("Note: FSK if_chain %d configuration; en:%d freq:%d bw:%d dr:%d (%d real dr) sync:0x%0*llX\n", if_chain, if_enable[if_chain], if_freq[if_chain], fsk_rx_bw, fsk_rx_dr, LGW_XTAL_FREQU/(LGW_XTAL_FREQU/fsk_rx_dr), 2*fsk_sync_word_size, fsk_sync_word); break; default: @@ -912,6 +1013,8 @@ int lgw_start(void) { uint16_t cal_time; uint8_t cal_status; + uint64_t fsk_sync_word_reg; + if (lgw_is_started == true) { DEBUG_MSG("Note: LoRa concentrator already started, restarting it now\n"); } @@ -954,7 +1057,7 @@ int lgw_start(void) { cal_cmd |= 0x20; /* Bit 5: 0: SX1257, 1: SX1255 */ #endif - #if ((CFG_BRD_1301REF868 == 1) || (CFG_BRD_1301REF433 == 1) || (CFG_BRD_KERLINK868 == 1)) + #if ((CFG_BRD_1301REF868 == 1) || (CFG_BRD_1301REF433 == 1) || (CFG_BRD_KERLINK868 == 1) || (CFG_BRD_KERLINK433 == 1) || (CFG_BRD_CISCO433 == 1) || (CFG_BRD_CISCO470 == 1) || (CFG_BRD_CISCO780 == 1)) cal_cmd |= 0x00; /* Bit 6-7: Board type 0: ref, 1: FPGA, 3: board X */ cal_time = 2300; /* measured between 2.1 and 2.2 sec, because 1 TX only */ #elif (CFG_BRD_NANO868 == 1) @@ -1117,6 +1220,11 @@ int lgw_start(void) { /* configure FSK modem (IF9) */ lgw_reg_w(LGW_IF_FREQ_9, IF_HZ_TO_REG(if_freq[9])); /* FSK modem, default 0 */ + lgw_reg_w(LGW_FSK_PSIZE, fsk_sync_word_size-1); + lgw_reg_w(LGW_FSK_TX_PSIZE, fsk_sync_word_size-1); + fsk_sync_word_reg = fsk_sync_word << (8 * (8 - fsk_sync_word_size)); + lgw_reg_w(LGW_FSK_REF_PATTERN_LSB, (uint32_t)(0xFFFFFFFF & fsk_sync_word_reg)); + lgw_reg_w(LGW_FSK_REF_PATTERN_MSB, (uint32_t)(0xFFFFFFFF & (fsk_sync_word_reg >> 32))); if (if_enable[9] == true) { lgw_reg_w(LGW_FSK_RADIO_SELECT, if_rf_chain[9]); lgw_reg_w(LGW_FSK_BR_RATIO,LGW_XTAL_FREQU/fsk_rx_dr); /* setting the dividing ratio for datarate */ @@ -1398,7 +1506,7 @@ int lgw_receive(uint8_t max_pkt, struct lgw_pkt_rx_s *pkt_data) { p->bandwidth = fsk_rx_bw; p->datarate = fsk_rx_dr; p->coderate = CR_UNDEFINED; - timestamp_correction = 0; // TODO: implement FSK timestamp correction + timestamp_correction = ((uint32_t)680000 / fsk_rx_dr) - 20; /* RSSI correction */ p->rssi -= RSSI_FSK_BIAS; @@ -1618,6 +1726,13 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) { buff[14] = 0; buff[15] = 0; + /* LSB of RF frequency is now used in AGC firmware to implement large/narrow filtering in SX1257/55 */ + if (pkt_data.bandwidth == BW_500KHZ) { + buff[2] |= 0x01; /* Enlarge filter for 500kHz BW */ + } else { + buff[2] &= 0xFE; + } + } else if (pkt_data.modulation == MOD_FSK) { /* metadata 7, modulation type, radio chain selection and TX power */ buff[7] = (0x20 & (pkt_data.rf_chain << 5)) | 0x10 | (0x0F & pow_index); /* bit 4 is 1 -> FSK modulation */ @@ -1628,12 +1743,11 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) { buff[9] = pkt_data.f_dev; /* metadata 10, payload size */ - buff[10] = pkt_data.size + 1; /* add a byte to encode payload length in the packet */ - /* TODO: handle fixed packet length */ + buff[10] = pkt_data.size; /* TODO: how to handle 255 bytes packets ?!? */ /* metadata 11, packet mode, CRC, encoding */ - buff[11] = (pkt_data.no_crc?0:0x02); /* always in fixed length packet mode, no DC-free encoding, CCITT CRC if CRC is not disabled */ + buff[11] = 0x01 | (pkt_data.no_crc?0:0x02) | (0x02 << 2); /* always in variable length packet mode, whitening, and CCITT CRC if CRC is not disabled */ /* metadata 12 & 13, FSK preamble size */ if (pkt_data.preamble == 0) { /* if not explicit, use LoRa MAC preamble size */ @@ -1655,6 +1769,9 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) { ++transfer_size; /* one more byte to transfer to the TX modem */ ++payload_offset; /* start the payload with one more byte of offset */ + /* LSB of RF frequency is now used in AGC firmware to implement large/narrow filtering in SX1257/55*/ + buff[2] &= 0xFE; /* Always use narrow band for FSK (force LSB to 0) */ + } else { DEBUG_MSG("ERROR: INVALID TX MODULATION..\n"); return LGW_HAL_ERROR; @@ -1664,9 +1781,7 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) { memcpy((void *)(buff + payload_offset), (void *)(pkt_data.payload), pkt_data.size); /* reset TX command flags */ - lgw_reg_w(LGW_TX_TRIG_IMMEDIATE, 0); - lgw_reg_w(LGW_TX_TRIG_DELAYED, 0); - lgw_reg_w(LGW_TX_TRIG_GPS, 0); + lgw_abort_tx(); /* put metadata + payload in the TX data buffer */ lgw_reg_w(LGW_TX_DATA_BUF_ADDR, 0); @@ -1729,6 +1844,17 @@ int lgw_status(uint8_t select, uint8_t *code) { /* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ +int lgw_abort_tx(void) { + int i; + + i = lgw_reg_w(LGW_TX_TRIG_ALL, 0); + + if (i == LGW_REG_SUCCESS) return LGW_HAL_SUCCESS; + else return LGW_HAL_ERROR; +} + +/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */ + int lgw_get_trigcnt(uint32_t* trig_cnt_us) { int i; int32_t val; diff --git a/libloragw/src/loragw_reg.c b/libloragw/src/loragw_reg.c index 32a8207..7f9ec40 100644 --- a/libloragw/src/loragw_reg.c +++ b/libloragw/src/loragw_reg.c @@ -391,7 +391,8 @@ const struct lgw_reg_s loregs[LGW_TOTALREGS] = { {2,94,0,0,4,1,0}, /* DATA_MNGT_STATUS */ {2,95,0,0,5,1,0}, /* DATA_MNGT_CPT_FRAME_ALLOCATED */ {2,96,0,0,5,1,0}, /* DATA_MNGT_CPT_FRAME_FINISHED */ - {2,97,0,0,5,1,0} /* DATA_MNGT_CPT_FRAME_READEN */ + {2,97,0,0,5,1,0}, /* DATA_MNGT_CPT_FRAME_READEN */ + {1,33,0,0,8,0,0} /* TX_TRIG_ALL (alias) */ }; /* -------------------------------------------------------------------------- */ diff --git a/libloragw/tst/test_loragw_hal.c b/libloragw/tst/test_loragw_hal.c index b7b8962..a196b99 100644 --- a/libloragw/tst/test_loragw_hal.c +++ b/libloragw/tst/test_loragw_hal.c @@ -58,6 +58,10 @@ Maintainer: Sylvain Miermont #define F_RX_0 433500000 #define F_RX_1 434500000 #define F_TX 434000000 +#elif (CFG_BAND_780 == 1) + #define F_RX_0 780500000 + #define F_RX_1 781500000 + #define F_TX 781000000 #endif /* -------------------------------------------------------------------------- */ |