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-rw-r--r--loragw_hal/inc/loragw_hal.h26
-rw-r--r--loragw_hal/inc/loragw_reg.h444
-rw-r--r--loragw_hal/src/agc_fw.var374
-rw-r--r--loragw_hal/src/arb_fw.var132
-rw-r--r--loragw_hal/src/loragw_hal.c72
-rw-r--r--loragw_hal/src/loragw_reg.c595
-rw-r--r--loragw_hal/test/test_loragw_hal.c40
7 files changed, 885 insertions, 798 deletions
diff --git a/loragw_hal/inc/loragw_hal.h b/loragw_hal/inc/loragw_hal.h
index 936d0af..feecf5c 100644
--- a/loragw_hal/inc/loragw_hal.h
+++ b/loragw_hal/inc/loragw_hal.h
@@ -125,6 +125,23 @@ F_register(24bit) = F_rf (Hz) / F_step(Hz)
//#define GPS_DELAYED 4
//#define EVENT_DELAYED 5
+/* values available for 'select' in the status function */
+#define TX_STATUS 1
+#define RX_STATUS 2
+
+/* status code for TX_STATUS */
+#define TX_STATUS_UNKNOWN 0
+#define TX_OFF 1 /* TX modem disabled, it will ignore commands */
+#define TX_EMPTY 2 /* TX modem is free, ready to receive a command */
+#define TX_DELAYED 3 /* TX modem is loaded, ready to send the packet after an event and/or delay */
+#define TX_EMITTING 4 /* TX modem is emitting */
+
+/* status code for RX_STATUS */
+#define RX_STATUS_UNKNOWN 0
+#define RX_OFF 1 /* RX modem is disabled, it will ignore commands */
+#define RX_ON 2 /* RX modem is receiving */
+#define RX_SUSPENDED 3 /* RX is suspended while a TX is ongoing */
+
/* -------------------------------------------------------------------------- */
/* --- PUBLIC TYPES --------------------------------------------------------- */
@@ -182,6 +199,7 @@ struct lgw_pkt_tx_s {
int8_t rf_power; /*!> TX power, in dBm */
uint8_t modulation; /*!> modulation to use for the packet */
uint8_t bandwidth; /*!> modulation bandwidth (Lora only) */
+ bool invert_pol; /*!> invert signal polarity, for orthogonal downlinks (Lora only) */
uint16_t f_dev; /*!> frequency deviation (FSK only) */
uint16_t datarate; /*!> TX datarate */
uint8_t coderate; /*!> error-correcting code of the packet */
@@ -238,6 +256,14 @@ int lgw_receive(uint8_t max_pkt, struct lgw_pkt_rx_s *pkt_data);
*/
int lgw_send(struct lgw_pkt_tx_s pkt_data);
+/**
+@brief Give the the status of different part of the Lora gateway
+@param select is used to select what status we want to know
+@param code is used to return the status code
+@return LGW_HAL_ERROR id the operation failed, LGW_HAL_SUCCESS else
+*/
+int lgw_status(uint8_t select, uint8_t *code);
+
#endif
/* --- EOF ------------------------------------------------------------------ */
diff --git a/loragw_hal/inc/loragw_reg.h b/loragw_hal/inc/loragw_reg.h
index 922d3df..1fc8d9b 100644
--- a/loragw_hal/inc/loragw_reg.h
+++ b/loragw_hal/inc/loragw_reg.h
@@ -30,10 +30,10 @@ Description:
#define LGW_REG_ERROR -1
/*
-auto generated register mapping for C code : 24-Jun-2013 20:29:09
+auto generated register mapping for C code : 11-Jul-2013 13:20:40
this file contains autogenerated C struct used to access the LORA register from the Primer firmware
this file is autogenerated from registers description
-290 registers are defined
+293 registers are defined
*/
#define LGW_PAGE_REG 0
@@ -110,224 +110,230 @@ this file is autogenerated from registers description
#define LGW_TX_TOP_RAM_BIST1_STATUS 71
#define LGW_DATA_MNGT_RAM_BIST0_STATUS 72
#define LGW_DATA_MNGT_RAM_BIST1_STATUS 73
-#define LGW_GPIO_SELECT 74
-#define LGW_GPIO_MUX 75
-#define LGW_EMERGENCY_FORCE_HOST_CTRL 76
-#define LGW_RX_INVERT_IQ 77
-#define LGW_MODEM_INVERT_IQ 78
-#define LGW_MBWSSF_MODEM_INVERT_IQ 79
-#define LGW_RX_EDGE_SELECT 80
-#define LGW_MISC_RADIO_EN 81
-#define LGW_FILTER_GAIN 82
-#define LGW_RADIO_SELECT 83
-#define LGW_IF_FREQ_0 84
-#define LGW_IF_FREQ_1 85
-#define LGW_IF_FREQ_2 86
-#define LGW_IF_FREQ_3 87
-#define LGW_IF_FREQ_4 88
-#define LGW_IF_FREQ_5 89
-#define LGW_IF_FREQ_6 90
-#define LGW_IF_FREQ_7 91
-#define LGW_IF_FREQ_8 92
-#define LGW_IF_FREQ_9 93
-#define LGW_CHANN_OVERRIDE_AGC_GAIN 94
-#define LGW_CHANN_AGC_GAIN 95
-#define LGW_CORR0_DETECT_EN 96
-#define LGW_CORR1_DETECT_EN 97
-#define LGW_CORR2_DETECT_EN 98
-#define LGW_CORR3_DETECT_EN 99
-#define LGW_CORR4_DETECT_EN 100
-#define LGW_CORR5_DETECT_EN 101
-#define LGW_CORR6_DETECT_EN 102
-#define LGW_CORR7_DETECT_EN 103
-#define LGW_CORR_SAME_PEAKS_OPTION_SF6 104
-#define LGW_CORR_SAME_PEAKS_OPTION_SF7 105
-#define LGW_CORR_SAME_PEAKS_OPTION_SF8 106
-#define LGW_CORR_SAME_PEAKS_OPTION_SF9 107
-#define LGW_CORR_SAME_PEAKS_OPTION_SF10 108
-#define LGW_CORR_SAME_PEAKS_OPTION_SF11 109
-#define LGW_CORR_SAME_PEAKS_OPTION_SF12 110
-#define LGW_CORR_SIG_NOISE_RATIO_SF6 111
-#define LGW_CORR_SIG_NOISE_RATIO_SF7 112
-#define LGW_CORR_SIG_NOISE_RATIO_SF8 113
-#define LGW_CORR_SIG_NOISE_RATIO_SF9 114
-#define LGW_CORR_SIG_NOISE_RATIO_SF10 115
-#define LGW_CORR_SIG_NOISE_RATIO_SF11 116
-#define LGW_CORR_SIG_NOISE_RATIO_SF12 117
-#define LGW_CORR_NUM_SAME_PEAK 118
-#define LGW_CORR_MAC_GAIN 119
-#define LGW_ADJUST_MODEM_START_OFFSET_RDX8 120
-#define LGW_ADJUST_MODEM_START_OFFSET_RDX4 121
-#define LGW_ADJUST_MODEM_START_OFFSET_SF12_RDX4 122
-#define LGW_DBG_CORR_SELECT_SF 123
-#define LGW_DBG_CORR_SELECT_CHANNEL 124
-#define LGW_DBG_DETECT_CPT 125
-#define LGW_DBG_SYMB_CPT 126
-#define LGW_CHIRP_INVERT_RX 127
-#define LGW_DC_NOTCH_EN 128
-#define LGW_IMPLICIT_CRC_EN 129
-#define LGW_IMPLICIT_CODING_RATE 130
-#define LGW_IMPLICIT_PAYLOAD_LENGHT 131
-#define LGW_FREQ_TO_TIME_INVERT 132
-#define LGW_FREQ_TO_TIME_DRIFT 133
-#define LGW_PAYLOAD_FINE_TIMING_GAIN 134
-#define LGW_PREAMBLE_FINE_TIMING_GAIN 135
-#define LGW_TRACKING_INTEGRAL 136
-#define LGW_FRAME_SYNCH_PEAK1_POS 137
-#define LGW_FRAME_SYNCH_PEAK2_POS 138
-#define LGW_PREAMBLE_SYMB1_NB 139
-#define LGW_FRAME_SYNCH_GAIN 140
-#define LGW_SYNCH_DETECT_TH 141
-#define LGW_LLR_SCALE 142
-#define LGW_SNR_AVG_CST 143
-#define LGW_PPM_OFFSET 144
-#define LGW_MAX_PAYLOAD_LEN 145
-#define LGW_ONLY_CRC_EN 146
-#define LGW_ZERO_PAD 147
-#define LGW_DEC_GAIN_OFFSET 148
-#define LGW_FORCE_HOST_REG_CTRL 149
-#define LGW_FORCE_HOST_RADIO_CTRL 150
-#define LGW_FORCE_HOST_FE_CTRL 151
-#define LGW_FORCE_DEC_FILTER_GAIN 152
-#define LGW_MCU_RST_0 153
-#define LGW_MCU_RST_1 154
-#define LGW_MCU_SELECT_MUX_0 155
-#define LGW_MCU_SELECT_MUX_1 156
-#define LGW_MCU_CORRUPTION_DETECTED_0 157
-#define LGW_MCU_CORRUPTION_DETECTED_1 158
-#define LGW_CHANN_SELECT_RSSI 159
-#define LGW_RSSI_BB_DEFAULT_VALUE 160
-#define LGW_RSSI_DEC_DEFAULT_VALUE 161
-#define LGW_RSSI_CHANN_DEFAULT_VALUE 162
-#define LGW_RSSI_BB_FILTER_ALPHA 163
-#define LGW_RSSI_DEC_FILTER_ALPHA 164
-#define LGW_RSSI_CHANN_FILTER_ALPHA 165
-#define LGW_IQ_MISMATCH_A_AMP_COEFF 166
-#define LGW_IQ_MISMATCH_A_PHI_COEFF 167
-#define LGW_IQ_MISMATCH_B_AMP_COEFF 168
-#define LGW_IQ_MISMATCH_B_SEL_I 169
-#define LGW_IQ_MISMATCH_B_PHI_COEFF 170
-#define LGW_TX_TRIG_IMMEDIATE 171
-#define LGW_TX_TRIG_DELAYED 172
-#define LGW_TX_TRIG_GPS 173
-#define LGW_TX_START_DELAY 174
-#define LGW_TX_FRAME_SYNCH_PEAK1_POS 175
-#define LGW_TX_FRAME_SYNCH_PEAK2_POS 176
-#define LGW_TX_PREAMBLE_SYMB1_NB 177
-#define LGW_TX_OFFSET_I 178
-#define LGW_TX_OFFSET_Q 179
-#define LGW_TX_MODE 180
-#define LGW_TX_ZERO_PAD 181
-#define LGW_TX_PPM_OFFSET 182
-#define LGW_TX_CHIRP_INVERT 183
-#define LGW_TX_CONT_CHIRP 184
-#define LGW_TX_GAIN 185
-#define LGW_TX_CHIRP_LOW_PASS 186
-#define LGW_TX_FCC_WIDEBAND 187
-#define LGW_TX_SWAP_IQ 188
-#define LGW_MBWSSF_IMPLICIT_HEADER 189
-#define LGW_MBWSSF_IMPLICIT_CRC_EN 190
-#define LGW_MBWSSF_IMPLICIT_CODING_RATE 191
-#define LGW_MBWSSF_IMPLICIT_PAYLOAD_LENGHT 192
-#define LGW_MBWSSF_AGC_FREEZE_ON_DETECT 193
-#define LGW_MBWSSF_FRAME_SYNCH_PEAK1_POS 194
-#define LGW_MBWSSF_FRAME_SYNCH_PEAK2_POS 195
-#define LGW_MBWSSF_PREAMBLE_SYMB1_NB 196
-#define LGW_MBWSSF_FRAME_SYNCH_GAIN 197
-#define LGW_MBWSSF_SYNCH_DETECT_TH 198
-#define LGW_MBWSSF_DETECT_MIN_SINGLE_PEAK 199
-#define LGW_MBWSSF_DETECT_TRIG_SAME_PEAK_NB 200
-#define LGW_MBWSSF_FREQ_TO_TIME_INVERT 201
-#define LGW_MBWSSF_FREQ_TO_TIME_DRIFT 202
-#define LGW_MBWSSF_PPM_CORRECTION 203
-#define LGW_MBWSSF_PAYLOAD_FINE_TIMING_GAIN 204
-#define LGW_MBWSSF_PREAMBLE_FINE_TIMING_GAIN 205
-#define LGW_MBWSSF_TRACKING_INTEGRAL 206
-#define LGW_MBWSSF_ZERO_PAD 207
-#define LGW_MBWSSF_MODEM_BW 208
-#define LGW_MBWSSF_RADIO_SELECT 209
-#define LGW_MBWSSF_RX_CHIRP_INVERT 210
-#define LGW_MBWSSF_LLR_SCALE 211
-#define LGW_MBWSSF_SNR_AVG_CST 212
-#define LGW_MBWSSF_PPM_OFFSET 213
-#define LGW_MBWSSF_RATE_SF 214
-#define LGW_MBWSSF_ONLY_CRC_EN 215
-#define LGW_MBWSSF_MAX_PAYLOAD_LEN 216
-#define LGW_SPI_RADIO_A__DATA 217
-#define LGW_SPI_RADIO_A__DATA_READBACK 218
-#define LGW_SPI_RADIO_A__ADDR 219
-#define LGW_SPI_RADIO_A__CS 220
-#define LGW_SPI_RADIO_B__DATA 221
-#define LGW_SPI_RADIO_B__DATA_READBACK 222
-#define LGW_SPI_RADIO_B__ADDR 223
-#define LGW_SPI_RADIO_B__CS 224
-#define LGW_RADIO_A_EN 225
-#define LGW_RADIO_B_EN 226
-#define LGW_RADIO_RST 227
-#define LGW_LNA_A_EN 228
-#define LGW_PA_A_EN 229
-#define LGW_LNA_B_EN 230
-#define LGW_PA_B_EN 231
-#define LGW_PA_A_GAIN 232
-#define LGW_PA_B_GAIN 233
-#define LGW_LNA_A_CTRL_LUT 234
-#define LGW_PA_A_CTRL_LUT 235
-#define LGW_LNA_B_CTRL_LUT 236
-#define LGW_PA_B_CTRL_LUT 237
-#define LGW_CAPTURE_SOURCE 238
-#define LGW_CAPTURE_START 239
-#define LGW_CAPTURE_FORCE_TRIGGER 240
-#define LGW_CAPTURE_WRAP 241
-#define LGW_CAPTURE_PERIOD 242
-#define LGW_LED_REG 243
-#define LGW_MODEM_STATUS 244
-#define LGW_VALID_HEADER_COUNTER_0 245
-#define LGW_VALID_HEADER_COUNTER_1 246
-#define LGW_VALID_PACKET_COUNTER_0 247
-#define LGW_VALID_PACKET_COUNTER_1 248
-#define LGW_VALID_HEADER_COUNTER_MBWSSF 249
-#define LGW_VALID_HEADER_COUNTER_FSK 250
-#define LGW_VALID_PACKET_COUNTER_MBWSSF 251
-#define LGW_VALID_PACKET_COUNTER_FSK 252
-#define LGW_CHANN_RSSI 253
-#define LGW_BB_RSSI 254
-#define LGW_DEC_RSSI 255
-#define LGW_DBG_MCU_DATA 256
-#define LGW_DBG_ARB_MCU_RAM_DATA 257
-#define LGW_DBG_AGC_MCU_RAM_DATA 258
-#define LGW_NEXT_PACKET_CNT 259
-#define LGW_ADDR_CAPTURE_COUNT 260
-#define LGW_TIMESTAMP 261
-#define LGW_DBG_CHANN0_GAIN 262
-#define LGW_DBG_CHANN1_GAIN 263
-#define LGW_DBG_CHANN2_GAIN 264
-#define LGW_DBG_CHANN3_GAIN 265
-#define LGW_DBG_CHANN4_GAIN 266
-#define LGW_DBG_CHANN5_GAIN 267
-#define LGW_DBG_CHANN6_GAIN 268
-#define LGW_DBG_CHANN7_GAIN 269
-#define LGW_DBG_DEC_FILT_GAIN 270
-#define LGW_SPI_DATA_FIFO_PTR 271
-#define LGW_PACKET_DATA_FIFO_PTR 272
-#define LGW_DBG_ARB_MCU_RAM_ADDR 273
-#define LGW_DBG_AGC_MCU_RAM_ADDR 274
-#define LGW_SPI_MASTER_CHIP_SELECT_POLARITY 275
-#define LGW_SPI_MASTER_CPOL 276
-#define LGW_SPI_MASTER_CPHA 277
-#define LGW_SIG_GEN_ANALYSER_MUX_SEL 278
-#define LGW_SIG_GEN_EN 279
-#define LGW_SIG_ANALYSER_EN 280
-#define LGW_SIG_ANALYSER_AVG_LEN 281
-#define LGW_SIG_ANALYSER_PRECISION 282
-#define LGW_SIG_ANALYSER_VALID_OUT 283
-#define LGW_SIG_GEN_FREQ 284
-#define LGW_SIG_ANALYSER_FREQ 285
-#define LGW_SIG_ANALYSER_I_OUT 286
-#define LGW_SIG_ANALYSER_Q_OUT 287
-#define LGW_GPS_EN 288
-#define LGW_GPS_POL 289
+#define LGW_GPIO_SELECT_INPUT 74
+#define LGW_GPIO_SELECT_OUTPUT 75
+#define LGW_GPIO_MODE 76
+#define LGW_GPIO_PIN_REG_IN 77
+#define LGW_GPIO_PIN_REG_OUT 78
+#define LGW_MCU_AGC_STATUS 79
+#define LGW_CHIP_ID 80
+#define LGW_EMERGENCY_FORCE_HOST_CTRL 81
+#define LGW_RX_INVERT_IQ 82
+#define LGW_MODEM_INVERT_IQ 83
+#define LGW_MBWSSF_MODEM_INVERT_IQ 84
+#define LGW_RX_EDGE_SELECT 85
+#define LGW_MISC_RADIO_EN 86
+#define LGW_FILTER_GAIN 87
+#define LGW_RADIO_SELECT 88
+#define LGW_IF_FREQ_0 89
+#define LGW_IF_FREQ_1 90
+#define LGW_IF_FREQ_2 91
+#define LGW_IF_FREQ_3 92
+#define LGW_IF_FREQ_4 93
+#define LGW_IF_FREQ_5 94
+#define LGW_IF_FREQ_6 95
+#define LGW_IF_FREQ_7 96
+#define LGW_IF_FREQ_8 97
+#define LGW_IF_FREQ_9 98
+#define LGW_CHANN_OVERRIDE_AGC_GAIN 99
+#define LGW_CHANN_AGC_GAIN 100
+#define LGW_CORR0_DETECT_EN 101
+#define LGW_CORR1_DETECT_EN 102
+#define LGW_CORR2_DETECT_EN 103
+#define LGW_CORR3_DETECT_EN 104
+#define LGW_CORR4_DETECT_EN 105
+#define LGW_CORR5_DETECT_EN 106
+#define LGW_CORR6_DETECT_EN 107
+#define LGW_CORR7_DETECT_EN 108
+#define LGW_CORR_SAME_PEAKS_OPTION_SF6 109
+#define LGW_CORR_SAME_PEAKS_OPTION_SF7 110
+#define LGW_CORR_SAME_PEAKS_OPTION_SF8 111
+#define LGW_CORR_SAME_PEAKS_OPTION_SF9 112
+#define LGW_CORR_SAME_PEAKS_OPTION_SF10 113
+#define LGW_CORR_SAME_PEAKS_OPTION_SF11 114
+#define LGW_CORR_SAME_PEAKS_OPTION_SF12 115
+#define LGW_CORR_SIG_NOISE_RATIO_SF6 116
+#define LGW_CORR_SIG_NOISE_RATIO_SF7 117
+#define LGW_CORR_SIG_NOISE_RATIO_SF8 118
+#define LGW_CORR_SIG_NOISE_RATIO_SF9 119
+#define LGW_CORR_SIG_NOISE_RATIO_SF10 120
+#define LGW_CORR_SIG_NOISE_RATIO_SF11 121
+#define LGW_CORR_SIG_NOISE_RATIO_SF12 122
+#define LGW_CORR_NUM_SAME_PEAK 123
+#define LGW_CORR_MAC_GAIN 124
+#define LGW_ADJUST_MODEM_START_OFFSET_RDX8 125
+#define LGW_ADJUST_MODEM_START_OFFSET_RDX4 126
+#define LGW_ADJUST_MODEM_START_OFFSET_SF12_RDX4 127
+#define LGW_DBG_CORR_SELECT_SF 128
+#define LGW_DBG_CORR_SELECT_CHANNEL 129
+#define LGW_DBG_DETECT_CPT 130
+#define LGW_DBG_SYMB_CPT 131
+#define LGW_CHIRP_INVERT_RX 132
+#define LGW_DC_NOTCH_EN 133
+#define LGW_IMPLICIT_CRC_EN 134
+#define LGW_IMPLICIT_CODING_RATE 135
+#define LGW_IMPLICIT_PAYLOAD_LENGHT 136
+#define LGW_FREQ_TO_TIME_INVERT 137
+#define LGW_FREQ_TO_TIME_DRIFT 138
+#define LGW_PAYLOAD_FINE_TIMING_GAIN 139
+#define LGW_PREAMBLE_FINE_TIMING_GAIN 140
+#define LGW_TRACKING_INTEGRAL 141
+#define LGW_FRAME_SYNCH_PEAK1_POS 142
+#define LGW_FRAME_SYNCH_PEAK2_POS 143
+#define LGW_PREAMBLE_SYMB1_NB 144
+#define LGW_FRAME_SYNCH_GAIN 145
+#define LGW_SYNCH_DETECT_TH 146
+#define LGW_LLR_SCALE 147
+#define LGW_SNR_AVG_CST 148
+#define LGW_PPM_OFFSET 149
+#define LGW_MAX_PAYLOAD_LEN 150
+#define LGW_ONLY_CRC_EN 151
+#define LGW_ZERO_PAD 152
+#define LGW_DEC_GAIN_OFFSET 153
+#define LGW_CHAN_GAIN_OFFSET 154
+#define LGW_FORCE_HOST_REG_CTRL 155
+#define LGW_FORCE_HOST_RADIO_CTRL 156
+#define LGW_FORCE_HOST_FE_CTRL 157
+#define LGW_FORCE_DEC_FILTER_GAIN 158
+#define LGW_MCU_RST_0 159
+#define LGW_MCU_RST_1 160
+#define LGW_MCU_SELECT_MUX_0 161
+#define LGW_MCU_SELECT_MUX_1 162
+#define LGW_MCU_CORRUPTION_DETECTED_0 163
+#define LGW_MCU_CORRUPTION_DETECTED_1 164
+#define LGW_MCU_SELECT_EDGE_0 165
+#define LGW_MCU_SELECT_EDGE_1 166
+#define LGW_CHANN_SELECT_RSSI 167
+#define LGW_RSSI_BB_DEFAULT_VALUE 168
+#define LGW_RSSI_DEC_DEFAULT_VALUE 169
+#define LGW_RSSI_CHANN_DEFAULT_VALUE 170
+#define LGW_RSSI_BB_FILTER_ALPHA 171
+#define LGW_RSSI_DEC_FILTER_ALPHA 172
+#define LGW_RSSI_CHANN_FILTER_ALPHA 173
+#define LGW_IQ_MISMATCH_A_AMP_COEFF 174
+#define LGW_IQ_MISMATCH_A_PHI_COEFF 175
+#define LGW_IQ_MISMATCH_B_AMP_COEFF 176
+#define LGW_IQ_MISMATCH_B_SEL_I 177
+#define LGW_IQ_MISMATCH_B_PHI_COEFF 178
+#define LGW_TX_TRIG_IMMEDIATE 179
+#define LGW_TX_TRIG_DELAYED 180
+#define LGW_TX_TRIG_GPS 181
+#define LGW_TX_START_DELAY 182
+#define LGW_TX_FRAME_SYNCH_PEAK1_POS 183
+#define LGW_TX_FRAME_SYNCH_PEAK2_POS 184
+#define LGW_TX_OFFSET_I 185
+#define LGW_TX_OFFSET_Q 186
+#define LGW_TX_MODE 187
+#define LGW_TX_ZERO_PAD 188
+#define LGW_TX_EDGE_SELECT 189
+#define LGW_TX_GAIN 190
+#define LGW_TX_CHIRP_LOW_PASS 191
+#define LGW_TX_FCC_WIDEBAND 192
+#define LGW_TX_SWAP_IQ 193
+#define LGW_MBWSSF_IMPLICIT_HEADER 194
+#define LGW_MBWSSF_IMPLICIT_CRC_EN 195
+#define LGW_MBWSSF_IMPLICIT_CODING_RATE 196
+#define LGW_MBWSSF_IMPLICIT_PAYLOAD_LENGHT 197
+#define LGW_MBWSSF_AGC_FREEZE_ON_DETECT 198
+#define LGW_MBWSSF_FRAME_SYNCH_PEAK1_POS 199
+#define LGW_MBWSSF_FRAME_SYNCH_PEAK2_POS 200
+#define LGW_MBWSSF_PREAMBLE_SYMB1_NB 201
+#define LGW_MBWSSF_FRAME_SYNCH_GAIN 202
+#define LGW_MBWSSF_SYNCH_DETECT_TH 203
+#define LGW_MBWSSF_DETECT_MIN_SINGLE_PEAK 204
+#define LGW_MBWSSF_DETECT_TRIG_SAME_PEAK_NB 205
+#define LGW_MBWSSF_FREQ_TO_TIME_INVERT 206
+#define LGW_MBWSSF_FREQ_TO_TIME_DRIFT 207
+#define LGW_MBWSSF_PPM_CORRECTION 208
+#define LGW_MBWSSF_PAYLOAD_FINE_TIMING_GAIN 209
+#define LGW_MBWSSF_PREAMBLE_FINE_TIMING_GAIN 210
+#define LGW_MBWSSF_TRACKING_INTEGRAL 211
+#define LGW_MBWSSF_ZERO_PAD 212
+#define LGW_MBWSSF_MODEM_BW 213
+#define LGW_MBWSSF_RADIO_SELECT 214
+#define LGW_MBWSSF_RX_CHIRP_INVERT 215
+#define LGW_MBWSSF_LLR_SCALE 216
+#define LGW_MBWSSF_SNR_AVG_CST 217
+#define LGW_MBWSSF_PPM_OFFSET 218
+#define LGW_MBWSSF_RATE_SF 219
+#define LGW_MBWSSF_ONLY_CRC_EN 220
+#define LGW_MBWSSF_MAX_PAYLOAD_LEN 221
+#define LGW_TX_STATUS 222
+#define LGW_SPI_RADIO_A__DATA 223
+#define LGW_SPI_RADIO_A__DATA_READBACK 224
+#define LGW_SPI_RADIO_A__ADDR 225
+#define LGW_SPI_RADIO_A__CS 226
+#define LGW_SPI_RADIO_B__DATA 227
+#define LGW_SPI_RADIO_B__DATA_READBACK 228
+#define LGW_SPI_RADIO_B__ADDR 229
+#define LGW_SPI_RADIO_B__CS 230
+#define LGW_RADIO_A_EN 231
+#define LGW_RADIO_B_EN 232
+#define LGW_RADIO_RST 233
+#define LGW_LNA_A_EN 234
+#define LGW_PA_A_EN 235
+#define LGW_LNA_B_EN 236
+#define LGW_PA_B_EN 237
+#define LGW_PA_GAIN 238
+#define LGW_LNA_A_CTRL_LUT 239
+#define LGW_PA_A_CTRL_LUT 240
+#define LGW_LNA_B_CTRL_LUT 241
+#define LGW_PA_B_CTRL_LUT 242
+#define LGW_CAPTURE_SOURCE 243
+#define LGW_CAPTURE_START 244
+#define LGW_CAPTURE_FORCE_TRIGGER 245
+#define LGW_CAPTURE_WRAP 246
+#define LGW_CAPTURE_PERIOD 247
+#define LGW_LED_REG 248
+#define LGW_MODEM_STATUS 249
+#define LGW_VALID_HEADER_COUNTER_0 250
+#define LGW_VALID_PACKET_COUNTER_0 251
+#define LGW_VALID_HEADER_COUNTER_MBWSSF 252
+#define LGW_VALID_HEADER_COUNTER_FSK 253
+#define LGW_VALID_PACKET_COUNTER_MBWSSF 254
+#define LGW_VALID_PACKET_COUNTER_FSK 255
+#define LGW_CHANN_RSSI 256
+#define LGW_BB_RSSI 257
+#define LGW_DEC_RSSI 258
+#define LGW_DBG_MCU_DATA 259
+#define LGW_DBG_ARB_MCU_RAM_DATA 260
+#define LGW_DBG_AGC_MCU_RAM_DATA 261
+#define LGW_NEXT_PACKET_CNT 262
+#define LGW_ADDR_CAPTURE_COUNT 263
+#define LGW_TIMESTAMP 264
+#define LGW_DBG_CHANN0_GAIN 265
+#define LGW_DBG_CHANN1_GAIN 266
+#define LGW_DBG_CHANN2_GAIN 267
+#define LGW_DBG_CHANN3_GAIN 268
+#define LGW_DBG_CHANN4_GAIN 269
+#define LGW_DBG_CHANN5_GAIN 270
+#define LGW_DBG_CHANN6_GAIN 271
+#define LGW_DBG_CHANN7_GAIN 272
+#define LGW_DBG_DEC_FILT_GAIN 273
+#define LGW_SPI_DATA_FIFO_PTR 274
+#define LGW_PACKET_DATA_FIFO_PTR 275
+#define LGW_DBG_ARB_MCU_RAM_ADDR 276
+#define LGW_DBG_AGC_MCU_RAM_ADDR 277
+#define LGW_SPI_MASTER_CHIP_SELECT_POLARITY 278
+#define LGW_SPI_MASTER_CPOL 279
+#define LGW_SPI_MASTER_CPHA 280
+#define LGW_SIG_GEN_ANALYSER_MUX_SEL 281
+#define LGW_SIG_GEN_EN 282
+#define LGW_SIG_ANALYSER_EN 283
+#define LGW_SIG_ANALYSER_AVG_LEN 284
+#define LGW_SIG_ANALYSER_PRECISION 285
+#define LGW_SIG_ANALYSER_VALID_OUT 286
+#define LGW_SIG_GEN_FREQ 287
+#define LGW_SIG_ANALYSER_FREQ 288
+#define LGW_SIG_ANALYSER_I_OUT 289
+#define LGW_SIG_ANALYSER_Q_OUT 290
+#define LGW_GPS_EN 291
+#define LGW_GPS_POL 292
+#define LGW_SW_TEST_REG1 293
+#define LGW_SW_TEST_REG2 294
+#define LGW_SW_TEST_REG3 295
-#define LGW_TOTALREGS 290
+#define LGW_TOTALREGS 296
/* -------------------------------------------------------------------------- */
/* --- PUBLIC FUNCTIONS PROTOTYPES ------------------------------------------ */
diff --git a/loragw_hal/src/agc_fw.var b/loragw_hal/src/agc_fw.var
index a0dde65..c913e0c 100644
--- a/loragw_hal/src/agc_fw.var
+++ b/loragw_hal/src/agc_fw.var
@@ -12,193 +12,193 @@ Description:
static uint8_t agc_firmware[MCU_AGC_FW_BYTE] = {
0x8A, 0x51, 0x11, 0x28, 0xFF, 0xBF, 0xFF, 0xBF, 0x80, 0x40, 0x03, 0x4E, 0x83, 0x52, 0x03, 0x53,
-0xA1, 0xC0, 0x04, 0x88, 0xA2, 0xC0, 0x0A, 0xC8, 0xA3, 0x00, 0x01, 0x88, 0xA4, 0xC0, 0x8A, 0x51,
-0x99, 0xEC, 0x8A, 0x51, 0xC4, 0xED, 0x83, 0x96, 0x03, 0x53, 0x2E, 0x48, 0xB4, 0x00, 0x2D, 0x48,
-0xB3, 0x40, 0x2C, 0x08, 0xB2, 0x00, 0x2B, 0x48, 0xB1, 0x00, 0x83, 0x52, 0x03, 0x53, 0x19, 0x54,
-0x99, 0x50, 0x19, 0x95, 0x99, 0x91, 0x19, 0x52, 0x99, 0x92, 0x19, 0x93, 0x99, 0xD3, 0x18, 0x12,
-0x90, 0x30, 0xA8, 0xC0, 0x28, 0xC8, 0x8B, 0x00, 0x98, 0x10, 0x18, 0x11, 0x98, 0x51, 0x97, 0x81,
-0x9A, 0x41, 0x9B, 0x81, 0x83, 0x96, 0x03, 0x53, 0xD1, 0x41, 0xD1, 0x8A, 0x0F, 0xB0, 0x83, 0x52,
-0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53, 0xD9, 0x40, 0xC9, 0x41, 0xD2, 0x41,
-0xD2, 0x8A, 0x0C, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xDA, 0x40, 0x06, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xCA, 0x00, 0x02, 0xF0, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xD3, 0x40, 0x0C, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xDB, 0x80, 0x0C, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xCB, 0x40, 0x03, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xD4, 0x00, 0x0C, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xDC, 0x40, 0x12, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xCC, 0x00, 0x04, 0xF0, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xD5, 0x40, 0x0F, 0xB0, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xDD, 0x80, 0x18, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xCD, 0x40, 0x04, 0xF0, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xD6, 0x40, 0x0C, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xDE, 0x80, 0x1E, 0xB0, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xCE, 0x40, 0x05, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xD7, 0x80, 0x0C, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xDF, 0xC0, 0x24, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xCF, 0x80, 0x05, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xD8, 0x00, 0x0C, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xE0, 0xC0, 0x2A, 0x70, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53,
-0xD0, 0xC0, 0xB9, 0x81, 0xBA, 0x81, 0xBB, 0xC1, 0xBC, 0x81, 0xBD, 0xC1, 0xBE, 0xC1, 0xBF, 0x01,
-0xC0, 0xC1, 0xC1, 0x01, 0x06, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96,
-0x03, 0x53, 0xC2, 0xC0, 0x0C, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96,
-0x03, 0x53, 0xC3, 0x00, 0x12, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96,
-0x03, 0x53, 0xC4, 0xC0, 0x18, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96,
-0x03, 0x53, 0xC5, 0x00, 0x1E, 0xB0, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96,
-0x03, 0x53, 0xC6, 0x00, 0x24, 0x30, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96,
-0x03, 0x53, 0xC7, 0x40, 0x2A, 0x70, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96,
-0x03, 0x53, 0xC8, 0xC0, 0xEF, 0x01, 0x02, 0xF0, 0x6F, 0xC2, 0x03, 0x5C, 0x28, 0x69, 0x29, 0xA9,
-0x2B, 0xE9, 0xA1, 0xA9, 0xA1, 0xA9, 0x6F, 0xC8, 0xEC, 0xBE, 0x84, 0x80, 0x83, 0x93, 0x80, 0x81,
-0x08, 0xF0, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x83, 0x96, 0x03, 0x53, 0x6F, 0xC8, 0xE9, 0xBE,
-0x84, 0x80, 0x83, 0x52, 0x03, 0x53, 0x28, 0xC8, 0x80, 0x40, 0x83, 0x96, 0x03, 0x53, 0x6F, 0xC8,
-0xEC, 0xBE, 0x84, 0x80, 0x00, 0x48, 0xD1, 0x7E, 0x84, 0x80, 0x00, 0x48, 0x83, 0x52, 0x03, 0x53,
-0xA8, 0xC0, 0x05, 0x30, 0x03, 0xD0, 0xA8, 0x8D, 0xFF, 0x7E, 0x03, 0x9D, 0x4A, 0xA9, 0x83, 0x96,
-0x03, 0x53, 0x6F, 0xC8, 0xEC, 0xBE, 0x84, 0x80, 0x00, 0x48, 0xD9, 0xBE, 0x84, 0x80, 0x00, 0x48,
-0x83, 0x52, 0x03, 0x53, 0xA9, 0x00, 0x29, 0x87, 0x28, 0xC4, 0xAA, 0x00, 0x2A, 0x08, 0x83, 0x96,
-0x03, 0x53, 0xAF, 0x80, 0x6F, 0xC8, 0x83, 0x52, 0x03, 0x53, 0xAB, 0x40, 0x2B, 0x48, 0x83, 0x96,
-0x03, 0x53, 0xB0, 0xC0, 0x0C, 0x30, 0x8A, 0x51, 0x84, 0x65, 0x8A, 0x51, 0x83, 0x52, 0x03, 0x53,
-0x98, 0x95, 0x98, 0x51, 0x83, 0x96, 0x03, 0x53, 0x6F, 0xC8, 0xE9, 0xBE, 0x84, 0x80, 0x83, 0x93,
-0x00, 0x48, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x03, 0x30, 0x03, 0xD0, 0xA8, 0x8D, 0xFF, 0x7E,
-0x03, 0x9D, 0x7D, 0x69, 0x03, 0xD0, 0x28, 0x4D, 0xA9, 0x00, 0x29, 0x08, 0x96, 0x00, 0x83, 0x96,
-0x03, 0x53, 0x6F, 0x18, 0x8C, 0xA9, 0x90, 0x69, 0x83, 0x52, 0x03, 0x53, 0x18, 0x14, 0x93, 0xE9,
-0x83, 0x52, 0x03, 0x53, 0x18, 0xD0, 0x18, 0x55, 0x18, 0x11, 0x01, 0xF0, 0xA8, 0xC0, 0x28, 0xC8,
-0x83, 0x96, 0x03, 0x53, 0xEF, 0x87, 0x02, 0xF0, 0x6F, 0xC2, 0x03, 0x5C, 0xA0, 0x69, 0xA1, 0xA9,
-0x2B, 0xE9, 0xEE, 0xC1, 0x04, 0xF0, 0x6E, 0x82, 0x03, 0x5C, 0xA7, 0x29, 0xA8, 0xA9, 0xAA, 0xE9,
-0xDE, 0x69, 0xDE, 0x69, 0x07, 0x70, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x83, 0x96, 0x03, 0x53,
-0x6E, 0x88, 0xE3, 0xBE, 0x84, 0x80, 0x83, 0x52, 0x03, 0x53, 0x28, 0xC8, 0x83, 0x93, 0x80, 0x40,
-0x83, 0x96, 0x03, 0x53, 0x6E, 0x88, 0xE3, 0xBE, 0x84, 0x80, 0x00, 0x48, 0x83, 0x52, 0x03, 0x53,
-0xA8, 0xC0, 0x28, 0xC8, 0x96, 0x00, 0x83, 0x96, 0x03, 0x53, 0x6E, 0x88, 0xB1, 0x7E, 0x84, 0x80,
-0x00, 0x48, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x95, 0x00, 0x98, 0x54, 0x98, 0x10,
-0x01, 0xF0, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53, 0xEE, 0x47, 0x04, 0xF0, 0x6E, 0x82,
-0x03, 0x5C, 0xDB, 0x69, 0xDC, 0x29, 0xAA, 0xE9, 0xDE, 0x69, 0xDE, 0x69, 0x83, 0x96, 0x03, 0x53,
-0x6C, 0x48, 0xC9, 0x7E, 0x84, 0x80, 0x83, 0x93, 0x00, 0x48, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0,
-0x28, 0xC8, 0x83, 0x96, 0x03, 0x53, 0xE7, 0x80, 0x69, 0x48, 0xB9, 0xBE, 0x84, 0x80, 0x00, 0x48,
-0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53, 0xE8, 0x00, 0x68, 0x08,
-0x67, 0x07, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53, 0xEB, 0x80,
-0x68, 0x08, 0x67, 0x07, 0xD6, 0xBE, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x97, 0x40,
-0x83, 0x96, 0x03, 0x53, 0x6D, 0x88, 0xC9, 0x7E, 0x84, 0x80, 0x00, 0x48, 0x83, 0x52, 0x03, 0x53,
-0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53, 0xE7, 0x80, 0x6A, 0x48, 0xB9, 0xBE, 0x84, 0x80,
-0x00, 0x48, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53, 0xE8, 0x00,
-0x68, 0x08, 0x67, 0x07, 0xD6, 0xBE, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x9C, 0x00,
-0x83, 0x96, 0x03, 0x53, 0xEE, 0xC1, 0x04, 0xF0, 0x6E, 0x82, 0x03, 0x5C, 0x30, 0x6A, 0x31, 0xAA,
-0x33, 0xEA, 0xBB, 0x6A, 0xBB, 0x6A, 0x6E, 0x88, 0xB1, 0x7E, 0x84, 0x80, 0x00, 0x48, 0x83, 0x52,
-0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x95, 0x00, 0x0D, 0x08, 0xA8, 0xC0, 0x83, 0x96, 0x03, 0x53,
-0x6E, 0x88, 0xB5, 0xBE, 0x84, 0x80, 0x83, 0x52, 0x03, 0x53, 0x28, 0xC8, 0x80, 0x40, 0x83, 0x96,
-0x03, 0x53, 0x6E, 0x88, 0xB5, 0xBE, 0x84, 0x80, 0x88, 0x30, 0x00, 0x42, 0x03, 0x5C, 0x51, 0xAA,
-0x52, 0xAA, 0x7A, 0x2A, 0x6E, 0x88, 0xE3, 0xBE, 0x84, 0x80, 0x0F, 0xB0, 0x00, 0x42, 0x03, 0x18,
-0x5A, 0xEA, 0x5B, 0x2A, 0x7A, 0x2A, 0x6E, 0x88, 0xE3, 0xBE, 0x84, 0x80, 0x00, 0x48, 0x01, 0xBE,
-0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x83, 0x96, 0x03, 0x53, 0x6E, 0x88, 0xE3, 0xBE, 0x84, 0x80,
-0x83, 0x52, 0x03, 0x53, 0x28, 0xC8, 0x80, 0x40, 0x83, 0x96, 0x03, 0x53, 0x6E, 0x88, 0xE3, 0xBE,
-0x84, 0x80, 0x00, 0x48, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x28, 0xC8, 0x96, 0x00, 0x98, 0x54,
-0x98, 0x10, 0xAE, 0x2A, 0x83, 0x96, 0x03, 0x53, 0x6E, 0x88, 0xB5, 0xBE, 0x84, 0x80, 0x2D, 0xB0,
-0x00, 0x42, 0x03, 0x18, 0x84, 0x6A, 0x85, 0xAA, 0xAE, 0x2A, 0x6E, 0x88, 0xE3, 0xBE, 0x84, 0x80,
-0x08, 0xF0, 0x00, 0x42, 0x03, 0x5C, 0x8D, 0xEA, 0x8E, 0xEA, 0xAE, 0x2A, 0x6E, 0x88, 0xE3, 0xBE,
-0x84, 0x80, 0x00, 0x48, 0xFF, 0x7E, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x83, 0x96, 0x03, 0x53,
-0x6E, 0x88, 0xE3, 0xBE, 0x84, 0x80, 0x83, 0x52, 0x03, 0x53, 0x28, 0xC8, 0x80, 0x40, 0x83, 0x96,
-0x03, 0x53, 0x6E, 0x88, 0xE3, 0xBE, 0x84, 0x80, 0x00, 0x48, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0,
-0x28, 0xC8, 0x96, 0x00, 0x98, 0x54, 0x98, 0x10, 0xAE, 0x2A, 0xAE, 0x2A, 0x01, 0xF0, 0x83, 0x52,
-0xA8, 0xC0, 0x28, 0xC8, 0x83, 0x96, 0x03, 0x53, 0xEE, 0x47, 0x04, 0xF0, 0x6E, 0x82, 0x03, 0x5C,
-0xBA, 0x2A, 0xBB, 0x6A, 0x33, 0xEA, 0xEF, 0x01, 0x02, 0xF0, 0x6F, 0xC2, 0x03, 0x5C, 0xC1, 0xAA,
-0xC2, 0xAA, 0xC4, 0xAA, 0x0C, 0x6C, 0x0C, 0x6C, 0x6F, 0x18, 0xC7, 0x2A, 0xCB, 0x2A, 0x83, 0x52,
-0x03, 0x53, 0x18, 0x14, 0xCE, 0x2A, 0x83, 0x52, 0x03, 0x53, 0x18, 0xD0, 0x0E, 0x08, 0xA8, 0xC0,
-0x28, 0xC8, 0x83, 0x96, 0x03, 0x53, 0xE2, 0x00, 0x88, 0x30, 0x62, 0x02, 0x03, 0x5C, 0xD9, 0x2A,
-0xDA, 0x2A, 0x0C, 0xAB, 0x6F, 0xC8, 0xE9, 0xBE, 0x84, 0x80, 0x0B, 0x70, 0x83, 0x93, 0x00, 0x42,
-0x03, 0x18, 0xE3, 0x2A, 0xE4, 0xEA, 0x0C, 0xAB, 0x6F, 0xC8, 0xE9, 0xBE, 0x84, 0x80, 0x00, 0x48,
-0x01, 0xBE, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x83, 0x96, 0x03, 0x53, 0x6F, 0xC8, 0xE9, 0xBE,
-0x84, 0x80, 0x83, 0x52, 0x03, 0x53, 0x28, 0xC8, 0x80, 0x40, 0x83, 0x96, 0x03, 0x53, 0x6F, 0xC8,
-0xE9, 0xBE, 0x84, 0x80, 0x00, 0x48, 0x83, 0x52, 0x03, 0x53, 0xA8, 0xC0, 0x03, 0x30, 0x03, 0xD0,
-0xA8, 0x8D, 0xFF, 0x7E, 0x03, 0x9D, 0xFF, 0xEA, 0x03, 0xD0, 0x28, 0x4D, 0xA9, 0x00, 0x29, 0x08,
-0x96, 0x00, 0x18, 0x55, 0x18, 0x11, 0x47, 0x2B, 0x2D, 0xB0, 0x83, 0x96, 0x03, 0x53, 0x62, 0x02,
-0x03, 0x18, 0x13, 0xEB, 0x14, 0xAB, 0x47, 0x2B, 0x6F, 0xC8, 0xE9, 0xBE, 0x84, 0x80, 0x09, 0x30,
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+0x92, 0xAC, 0x93, 0xEC, 0xA0, 0x6C, 0x1D, 0xB0, 0xA2, 0xC0, 0x22, 0xC8, 0xAF, 0x80, 0x28, 0xC8,
+0xA3, 0x00, 0x23, 0x08, 0xB0, 0xC0, 0x08, 0xF0, 0x8A, 0x51, 0x04, 0x25, 0x8A, 0x51, 0xB0, 0xAC,
+0x3B, 0xF0, 0x83, 0x52, 0x03, 0x53, 0xA2, 0xC0, 0x22, 0xC8, 0xAF, 0x80, 0x28, 0xC8, 0xA3, 0x00,
+0x23, 0x08, 0xB0, 0xC0, 0x08, 0xF0, 0x8A, 0x51, 0x04, 0x25, 0x8A, 0x51, 0xB0, 0xAC, 0xB0, 0xAC,
+0x83, 0x52, 0x03, 0x53, 0x93, 0x1B, 0xB5, 0x2C, 0xB6, 0x2C, 0xB0, 0xAC, 0xB7, 0x6C, 0x28, 0xC8,
+0x03, 0x9D, 0xBB, 0x6C, 0xBE, 0x6C, 0x99, 0x91, 0x19, 0x95, 0xC1, 0xAC, 0x99, 0x50, 0x19, 0x54,
+0xC1, 0xAC, 0x03, 0x30, 0xA2, 0xC0, 0x22, 0xC8, 0xAF, 0x80, 0x28, 0xC8, 0xA3, 0x00, 0x23, 0x08,
+0xB0, 0xC0, 0x00, 0xB0, 0x8A, 0x51, 0x04, 0x25, 0x8A, 0x51, 0x83, 0x52, 0x03, 0x53, 0x18, 0x56,
+0xD1, 0xEC, 0x90, 0x30, 0xA2, 0xC0, 0x22, 0xC8, 0x8B, 0x00, 0x27, 0x48, 0x81, 0x80, 0x26, 0x08,
+0x8A, 0xC0, 0x25, 0x08, 0x84, 0x80, 0x24, 0x4E, 0x83, 0xC0, 0x80, 0x0E, 0x00, 0xCE, 0x09, 0x80,
+0x83, 0x52, 0x03, 0x53, 0xAA, 0x00, 0x83, 0x96, 0x03, 0x53, 0x31, 0x08, 0x03, 0x9D, 0xE9, 0x2C,
+0xF5, 0x6C, 0x30, 0xC8, 0x83, 0x52, 0x03, 0x53, 0xA9, 0x00, 0x29, 0x08, 0x88, 0x80, 0x2A, 0x08,
+0x80, 0x38, 0xA9, 0x00, 0x29, 0x08, 0x86, 0xC0, 0x03, 0xAD, 0x83, 0x96, 0x03, 0x53, 0x30, 0xC8,
+0x83, 0x52, 0x03, 0x53, 0xA9, 0x00, 0x29, 0x08, 0x88, 0x80, 0x2A, 0x08, 0x80, 0x38, 0xA9, 0x00,
+0x29, 0x08, 0x85, 0xC0, 0x03, 0xAD, 0x08, 0x40, 0x83, 0x52, 0x03, 0x53, 0xA1, 0xC0, 0x30, 0xC8,
+0x03, 0x9D, 0x0B, 0xED, 0x15, 0xED, 0x2F, 0x88, 0xA0, 0x80, 0x20, 0x88, 0x88, 0x80, 0x21, 0xC8,
+0x80, 0x38, 0xA0, 0x80, 0x20, 0x88, 0x86, 0xC0, 0x1F, 0x6D, 0x2F, 0x88, 0xA0, 0x80, 0x20, 0x88,
+0x88, 0x80, 0x21, 0xC8, 0x80, 0x38, 0xA0, 0x80, 0x20, 0x88, 0x85, 0xC0, 0x1F, 0x6D, 0x08, 0x40,
+0x83, 0x96, 0x03, 0x53, 0x8A, 0x51, 0x35, 0xE5, 0x8A, 0x51, 0xAC, 0x00, 0x8A, 0x51, 0x36, 0xE5,
+0x8A, 0x51, 0xAD, 0x40, 0x8A, 0x51, 0x37, 0x25, 0x8A, 0x51, 0xAE, 0x40, 0x8A, 0x51, 0x38, 0xA5,
+0x8A, 0x51, 0xAF, 0x80, 0x83, 0x01, 0x8A, 0x51, 0x13, 0x68, 0x00, 0xF4, 0x01, 0x34, 0x02, 0x34,
+0x03, 0x74, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
diff --git a/loragw_hal/src/arb_fw.var b/loragw_hal/src/arb_fw.var
index 2cb66f5..58e4f96 100644
--- a/loragw_hal/src/arb_fw.var
+++ b/loragw_hal/src/arb_fw.var
@@ -11,7 +11,7 @@ Description:
*/
static uint8_t arb_firmware[MCU_ARB_FW_BYTE] = {
-0x31, 0xAA, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
+0xFF, 0xE9, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
@@ -73,70 +73,70 @@ static uint8_t arb_firmware[MCU_ARB_FW_BYTE] = {
0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
-0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
-0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
-0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
-0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
-0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
-0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
-0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF,
-0xFF, 0xBF, 0x64, 0xC0, 0x80, 0x81, 0x84, 0x0A, 0x04, 0xC6, 0x03, 0x59, 0x00, 0xF4, 0x04, 0xC6,
-0x2A, 0xAA, 0xDA, 0x81, 0x83, 0x93, 0x22, 0x30, 0x84, 0x80, 0x5A, 0xB0, 0x29, 0x62, 0xDB, 0xC1,
-0xDC, 0x81, 0xDD, 0xC1, 0xE3, 0x81, 0xE1, 0x41, 0xE2, 0x41, 0xF6, 0x30, 0x84, 0x80, 0xFE, 0x70,
-0x29, 0x62, 0x83, 0x01, 0xA8, 0xAA, 0x83, 0x52, 0xE2, 0x41, 0x08, 0xF0, 0x62, 0x02, 0x03, 0x5C,
-0x4A, 0xAA, 0x4B, 0xEA, 0x4D, 0xEA, 0x70, 0xAA, 0x70, 0xAA, 0x62, 0x08, 0x32, 0x3E, 0x84, 0x80,
-0x83, 0x93, 0x80, 0x81, 0x62, 0x08, 0x3A, 0x7E, 0x84, 0x80, 0x80, 0x81, 0x62, 0x08, 0x4A, 0x3E,
-0x84, 0x80, 0x80, 0x81, 0x62, 0x08, 0x22, 0xFE, 0x84, 0x80, 0x80, 0x81, 0x62, 0x08, 0x42, 0xFE,
-0x84, 0x80, 0x80, 0x81, 0x62, 0x08, 0x2A, 0x3E, 0x84, 0x80, 0x80, 0x81, 0x01, 0xF0, 0xDE, 0x80,
-0x5E, 0x88, 0xE2, 0xC7, 0x08, 0xF0, 0x62, 0x02, 0x03, 0x5C, 0x6F, 0x6A, 0x70, 0xAA, 0x4D, 0xEA,
-0xE1, 0x41, 0x5A, 0x50, 0xDA, 0x90, 0x08, 0x40, 0x83, 0x52, 0xDF, 0xC0, 0xDA, 0x90, 0x5F, 0xC8,
-0xDE, 0x80, 0x5E, 0x88, 0x96, 0x00, 0x8D, 0xDC, 0x7E, 0x6A, 0x7F, 0xAA, 0xA7, 0x2A, 0x15, 0x54,
-0xDA, 0xD4, 0x82, 0x6A, 0x0D, 0xDD, 0x85, 0xAA, 0x86, 0xAA, 0x82, 0x6A, 0x87, 0xEA, 0x10, 0x88,
-0xDE, 0x80, 0x5E, 0x88, 0x83, 0x96, 0xF8, 0x40, 0x83, 0x52, 0x11, 0xC8, 0xDE, 0x80, 0x5E, 0x88,
-0x83, 0x96, 0xF9, 0x80, 0x83, 0x52, 0x0F, 0x48, 0xDE, 0x80, 0x5E, 0x88, 0x83, 0x96, 0xFB, 0xC0,
-0x83, 0x52, 0x0E, 0x08, 0xDE, 0x80, 0x5E, 0x88, 0x83, 0x96, 0xF7, 0xC0, 0x83, 0x52, 0x12, 0xC8,
-0xDE, 0x80, 0x5E, 0x88, 0x83, 0x96, 0xFA, 0x80, 0x83, 0x52, 0x15, 0x10, 0xA7, 0x2A, 0x08, 0x40,
-0x43, 0x62, 0xD0, 0xAA, 0xD0, 0xAA, 0xE1, 0x41, 0x04, 0xF0, 0x61, 0x02, 0x03, 0x5C, 0xB1, 0xEA,
-0xB2, 0xEA, 0xB4, 0xEA, 0xD0, 0xAA, 0xD0, 0xAA, 0x5A, 0x94, 0x61, 0x08, 0x74, 0xA2, 0x83, 0x52,
-0xDA, 0x1C, 0xBB, 0x6A, 0xBC, 0x2A, 0xBE, 0x6A, 0x36, 0xE3, 0xBE, 0x6A, 0x83, 0x52, 0x0D, 0x9C,
-0xC2, 0xAA, 0xC3, 0xEA, 0xC5, 0xEA, 0xD0, 0xAA, 0xD0, 0xAA, 0x01, 0xF0, 0xE0, 0xC0, 0x60, 0xC8,
-0xE1, 0xC7, 0x04, 0xF0, 0x61, 0x02, 0x03, 0x5C, 0xCE, 0x2A, 0xCF, 0x6A, 0xB4, 0xEA, 0xD0, 0xAA,
-0x83, 0x52, 0x0D, 0x9C, 0xD4, 0xEA, 0xD5, 0x2A, 0xAB, 0x2A, 0x5A, 0xDC, 0xD8, 0xEA, 0xD9, 0x2A,
-0xDB, 0x6A, 0xE0, 0x62, 0xDB, 0x6A, 0x83, 0x52, 0x5A, 0x50, 0xD0, 0xAA, 0xD0, 0xAA, 0x00, 0xA8,
-0x83, 0x52, 0xDC, 0x81, 0xE2, 0x41, 0x08, 0xF0, 0x62, 0x02, 0x03, 0x5C, 0xE8, 0xEA, 0xE9, 0x2A,
-0xEB, 0x6A, 0x35, 0x2B, 0x35, 0x2B, 0x62, 0x08, 0x2A, 0x3E, 0x84, 0x80, 0x83, 0x93, 0x00, 0x48,
-0x01, 0x7A, 0x03, 0x9D, 0xF4, 0x2A, 0xF5, 0x6A, 0x2A, 0xEB, 0x01, 0xF0, 0xDE, 0x80, 0x5E, 0x88,
-0xDC, 0x07, 0x62, 0x08, 0x2A, 0x3E, 0x84, 0x80, 0x80, 0x81, 0x62, 0x08, 0x42, 0xFE, 0x84, 0x80,
-0x00, 0x48, 0xDE, 0x80, 0x5E, 0x88, 0x97, 0x40, 0x62, 0x08, 0x22, 0xFE, 0x84, 0x80, 0x00, 0x48,
-0xDE, 0x80, 0x5E, 0x88, 0x98, 0xC0, 0x62, 0x08, 0x32, 0x3E, 0x84, 0x80, 0x00, 0x48, 0xDE, 0x80,
-0x5E, 0x88, 0x99, 0x00, 0x62, 0x08, 0x3A, 0x7E, 0x84, 0x80, 0x00, 0x48, 0xDE, 0x80, 0x5E, 0x88,
-0x9A, 0x00, 0x62, 0x08, 0xDE, 0x80, 0x5E, 0x88, 0x9B, 0x40, 0x62, 0x08, 0x4A, 0x3E, 0x84, 0x80,
-0x00, 0x48, 0xDE, 0x80, 0x5E, 0x88, 0x9C, 0x00, 0x95, 0x94, 0x95, 0x94, 0x95, 0x94, 0x95, 0x94,
-0x95, 0x50, 0x2A, 0xEB, 0x01, 0xF0, 0xDE, 0x80, 0x5E, 0x88, 0xE2, 0xC7, 0x08, 0xF0, 0x62, 0x02,
-0x03, 0x5C, 0x33, 0x2B, 0x34, 0xEB, 0xEB, 0x6A, 0x35, 0x2B, 0x08, 0x40, 0x83, 0x52, 0x5A, 0x91,
-0xE2, 0x41, 0x08, 0xF0, 0x62, 0x02, 0x03, 0x5C, 0x3E, 0x6B, 0x3F, 0xAB, 0x41, 0xAB, 0x96, 0x2B,
-0x96, 0x2B, 0x5A, 0xD9, 0x44, 0xAB, 0x45, 0xEB, 0x85, 0xEB, 0x14, 0x30, 0x83, 0x96, 0x7B, 0xC2,
-0x03, 0x18, 0x4B, 0x2B, 0x4C, 0xEB, 0x4F, 0x6B, 0x83, 0x52, 0x5A, 0xD5, 0x4F, 0x6B, 0x01, 0xF0,
-0x83, 0x52, 0xDE, 0x80, 0x62, 0x4A, 0x56, 0x2B, 0x03, 0xD0, 0xDE, 0x4D, 0xFF, 0x7E, 0x03, 0x9D,
-0x54, 0xEB, 0x5E, 0x88, 0x13, 0x45, 0x03, 0x9D, 0x5E, 0x6B, 0x5F, 0xAB, 0x6A, 0x2B, 0x62, 0x08,
-0x2A, 0x3E, 0x84, 0x80, 0x83, 0x93, 0x00, 0x48, 0x01, 0x7A, 0x03, 0x9D, 0x68, 0xEB, 0x69, 0x2B,
-0x85, 0xEB, 0x6A, 0x2B, 0x62, 0x08, 0x42, 0xFE, 0x84, 0x80, 0x83, 0x93, 0x00, 0x48, 0x83, 0x96,
-0x7A, 0xC6, 0x03, 0x9D, 0x74, 0x2B, 0x75, 0x6B, 0x85, 0xEB, 0x83, 0x52, 0x62, 0x08, 0x22, 0xFE,
+0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0xFF, 0xBF, 0x64, 0xC0,
+0x80, 0x81, 0x84, 0x0A, 0x04, 0xC6, 0x03, 0x59, 0x00, 0xF4, 0x04, 0xC6, 0xF8, 0x29, 0xDB, 0xC1,
+0x83, 0x93, 0x20, 0xF0, 0x84, 0x80, 0x5B, 0xF0, 0xF7, 0x61, 0xE1, 0x41, 0xDF, 0x01, 0xE0, 0x01,
+0xF6, 0x30, 0x84, 0x80, 0xFE, 0x70, 0xF7, 0x61, 0x83, 0x01, 0x42, 0x6A, 0x83, 0x52, 0xDD, 0x80,
+0xDB, 0xD0, 0x5D, 0x88, 0xDC, 0x40, 0x5C, 0x48, 0x96, 0x00, 0x8D, 0xDC, 0x18, 0x6A, 0x19, 0xAA,
+0x41, 0x6A, 0x15, 0x54, 0xDB, 0x14, 0x1C, 0xAA, 0x0D, 0xDD, 0x1F, 0x2A, 0x20, 0x2A, 0x1C, 0xAA,
+0x21, 0x6A, 0x10, 0x88, 0xDC, 0x40, 0x5C, 0x48, 0x83, 0x96, 0xF8, 0x40, 0x83, 0x52, 0x11, 0xC8,
+0xDC, 0x40, 0x5C, 0x48, 0x83, 0x96, 0xF9, 0x80, 0x83, 0x52, 0x0F, 0x48, 0xDC, 0x40, 0x5C, 0x48,
+0x83, 0x96, 0xFB, 0xC0, 0x83, 0x52, 0x0E, 0x08, 0xDC, 0x40, 0x5C, 0x48, 0x83, 0x96, 0xF7, 0xC0,
+0x83, 0x52, 0x12, 0xC8, 0xDC, 0x40, 0x5C, 0x48, 0x83, 0x96, 0xFA, 0x80, 0x83, 0x52, 0x15, 0x10,
+0x41, 0x6A, 0x08, 0x40, 0xD6, 0xE2, 0x83, 0x52, 0x9E, 0x81, 0x46, 0xAA, 0x1E, 0x48, 0x01, 0xBE,
+0xDE, 0x80, 0x5E, 0x88, 0x9E, 0x40, 0x71, 0xEA, 0xDF, 0x01, 0x08, 0xF0, 0x5F, 0xC2, 0x03, 0x5C,
+0x52, 0xAA, 0x53, 0xEA, 0x55, 0xEA, 0x71, 0xEA, 0x71, 0xEA, 0x5B, 0xD4, 0x5F, 0xC8, 0x0E, 0x62,
+0x83, 0x52, 0xDB, 0x5C, 0x5C, 0xEA, 0x5D, 0x2A, 0x5F, 0x6A, 0x36, 0xE3, 0x5F, 0x6A, 0x83, 0x52,
+0x0D, 0x9C, 0x63, 0xEA, 0x64, 0xAA, 0x66, 0xEA, 0x71, 0xEA, 0x71, 0xEA, 0x01, 0xF0, 0xDE, 0x80,
+0x5E, 0x88, 0xDF, 0x87, 0x08, 0xF0, 0x5F, 0xC2, 0x03, 0x5C, 0x6F, 0x6A, 0x70, 0xAA, 0x55, 0xEA,
+0x71, 0xEA, 0x0D, 0x9C, 0x74, 0xEA, 0x75, 0x2A, 0x4C, 0xAA, 0x5B, 0x1C, 0x78, 0xEA, 0x79, 0x2A,
+0x7B, 0x6A, 0x80, 0xE2, 0x7B, 0x6A, 0x83, 0x52, 0x5B, 0x90, 0x46, 0xAA, 0x46, 0xAA, 0x00, 0xA8,
+0x83, 0x52, 0xD9, 0x81, 0xE0, 0x01, 0x08, 0xF0, 0x60, 0xC2, 0x03, 0x5C, 0x88, 0x6A, 0x89, 0xAA,
+0x8B, 0xEA, 0xD5, 0x2A, 0xD5, 0x2A, 0x60, 0xC8, 0x28, 0xFE, 0x84, 0x80, 0x83, 0x93, 0x00, 0x48,
+0x01, 0x7A, 0x03, 0x9D, 0x94, 0xAA, 0x95, 0xEA, 0xCA, 0xEA, 0x01, 0xF0, 0xDC, 0x40, 0x5C, 0x48,
+0xD9, 0x07, 0x60, 0xC8, 0x28, 0xFE, 0x84, 0x80, 0x80, 0x81, 0x60, 0xC8, 0x40, 0xBE, 0x84, 0x80,
+0x00, 0x48, 0xDC, 0x40, 0x5C, 0x48, 0x97, 0x40, 0x60, 0xC8, 0x20, 0xBE, 0x84, 0x80, 0x00, 0x48,
+0xDC, 0x40, 0x5C, 0x48, 0x98, 0xC0, 0x60, 0xC8, 0x30, 0xFE, 0x84, 0x80, 0x00, 0x48, 0xDC, 0x40,
+0x5C, 0x48, 0x99, 0x00, 0x60, 0xC8, 0x38, 0x3E, 0x84, 0x80, 0x00, 0x48, 0xDC, 0x40, 0x5C, 0x48,
+0x9A, 0x00, 0x60, 0xC8, 0xDC, 0x40, 0x5C, 0x48, 0x9B, 0x40, 0x60, 0xC8, 0x48, 0xFE, 0x84, 0x80,
+0x00, 0x48, 0xDC, 0x40, 0x5C, 0x48, 0x9C, 0x00, 0x95, 0x94, 0x95, 0x94, 0x95, 0x94, 0x95, 0x94,
+0x95, 0x50, 0xCA, 0xEA, 0x01, 0xF0, 0xDC, 0x40, 0x5C, 0x48, 0xE0, 0x87, 0x08, 0xF0, 0x60, 0xC2,
+0x03, 0x5C, 0xD3, 0x2A, 0xD4, 0xEA, 0x8B, 0xEA, 0xD5, 0x2A, 0x08, 0x40, 0x83, 0x52, 0x95, 0x41,
+0x96, 0x41, 0x97, 0x81, 0x98, 0x01, 0x99, 0x41, 0x9A, 0x41, 0x9B, 0x81, 0x9C, 0x41, 0x9E, 0x81,
+0xE0, 0x01, 0x08, 0xF0, 0x60, 0xC2, 0x03, 0x5C, 0xE6, 0x2A, 0xE7, 0x6A, 0xE9, 0x2A, 0x0C, 0xAB,
+0x0C, 0xAB, 0x60, 0xC8, 0x30, 0xFE, 0x84, 0x80, 0x83, 0x93, 0x80, 0x81, 0x60, 0xC8, 0x38, 0x3E,
+0x84, 0x80, 0x80, 0x81, 0x60, 0xC8, 0x48, 0xFE, 0x84, 0x80, 0x80, 0x81, 0x60, 0xC8, 0x20, 0xBE,
+0x84, 0x80, 0x80, 0x81, 0x60, 0xC8, 0x40, 0xBE, 0x84, 0x80, 0x80, 0x81, 0x60, 0xC8, 0x28, 0xFE,
+0x84, 0x80, 0x80, 0x81, 0x01, 0xF0, 0xDC, 0x40, 0x5C, 0x48, 0xE0, 0x87, 0x08, 0xF0, 0x60, 0xC2,
+0x03, 0x5C, 0x0B, 0xEB, 0x0C, 0xAB, 0xE9, 0x2A, 0xDF, 0x01, 0x5B, 0x90, 0xDB, 0xD0, 0xD9, 0x81,
+0x5B, 0xD1, 0x83, 0x96, 0xFB, 0x01, 0x83, 0x52, 0x97, 0x81, 0x98, 0x01, 0x99, 0x41, 0x9A, 0x41,
+0x9B, 0x81, 0x9C, 0x41, 0xD4, 0x41, 0xD5, 0x81, 0xD2, 0x41, 0xD3, 0x81, 0xD0, 0x01, 0xD1, 0x41,
+0xD6, 0x81, 0xD7, 0xC1, 0x83, 0x96, 0xF8, 0x81, 0xF9, 0xC1, 0xFB, 0x01, 0xF7, 0x01, 0xFA, 0xC1,
+0xFC, 0xC1, 0xFD, 0x01, 0xF6, 0xC1, 0x83, 0x52, 0xE0, 0x01, 0xDF, 0x01, 0xE1, 0x41, 0x5B, 0x90,
+0xDB, 0xD0, 0x5B, 0xD1, 0xD9, 0x81, 0xD8, 0x41, 0xDA, 0x81, 0x08, 0x40, 0x83, 0x52, 0x5B, 0xD1,
+0xE0, 0x01, 0x08, 0xF0, 0x60, 0xC2, 0x03, 0x5C, 0x3E, 0x6B, 0x3F, 0xAB, 0x41, 0xAB, 0x96, 0x2B,
+0x96, 0x2B, 0x5B, 0x19, 0x44, 0xAB, 0x45, 0xEB, 0x85, 0xEB, 0x14, 0x30, 0x83, 0x96, 0x7B, 0xC2,
+0x03, 0x18, 0x4B, 0x2B, 0x4C, 0xEB, 0x4F, 0x6B, 0x83, 0x52, 0x5B, 0x15, 0x4F, 0x6B, 0x01, 0xF0,
+0x83, 0x52, 0xDC, 0x40, 0x60, 0x0A, 0x56, 0x2B, 0x03, 0xD0, 0xDC, 0x0D, 0xFF, 0x7E, 0x03, 0x9D,
+0x54, 0xEB, 0x5C, 0x48, 0x13, 0x45, 0x03, 0x9D, 0x5E, 0x6B, 0x5F, 0xAB, 0x6A, 0x2B, 0x60, 0xC8,
+0x28, 0xFE, 0x84, 0x80, 0x83, 0x93, 0x00, 0x48, 0x01, 0x7A, 0x03, 0x9D, 0x68, 0xEB, 0x69, 0x2B,
+0x85, 0xEB, 0x6A, 0x2B, 0x60, 0xC8, 0x40, 0xBE, 0x84, 0x80, 0x83, 0x93, 0x00, 0x48, 0x83, 0x96,
+0x7A, 0xC6, 0x03, 0x9D, 0x74, 0x2B, 0x75, 0x6B, 0x85, 0xEB, 0x83, 0x52, 0x60, 0xC8, 0x20, 0xBE,
0x84, 0x80, 0x00, 0x48, 0x83, 0x96, 0x77, 0x06, 0x03, 0x9D, 0x7F, 0xEB, 0x80, 0x6B, 0x85, 0xEB,
-0x83, 0x52, 0x5A, 0xD5, 0x85, 0xEB, 0x85, 0xEB, 0x85, 0xEB, 0x83, 0x52, 0x5A, 0x1D, 0x89, 0xEB,
-0x8A, 0xEB, 0x8C, 0xEB, 0x96, 0x2B, 0x96, 0x2B, 0x01, 0xF0, 0xDE, 0x80, 0x5E, 0x88, 0xE2, 0xC7,
-0x08, 0xF0, 0x62, 0x02, 0x03, 0x5C, 0x95, 0x2B, 0x96, 0x2B, 0x41, 0xAB, 0x5A, 0xD9, 0x99, 0x2B,
-0x9A, 0x2B, 0xFF, 0x2B, 0xE2, 0x41, 0x08, 0xF0, 0x62, 0x02, 0x03, 0x5C, 0xA0, 0xAB, 0xA1, 0xEB,
-0xA3, 0x2B, 0xFF, 0x2B, 0xFF, 0x2B, 0x01, 0xF0, 0xDE, 0x80, 0x62, 0x4A, 0xA9, 0x2B, 0x03, 0xD0,
-0xDE, 0x4D, 0xFF, 0x7E, 0x03, 0x9D, 0xA7, 0x6B, 0x5E, 0x88, 0x13, 0x45, 0x03, 0x9D, 0xB1, 0x2B,
-0xB2, 0x2B, 0xF3, 0xAB, 0x62, 0x08, 0x2A, 0x3E, 0x84, 0x80, 0x83, 0x93, 0x80, 0x88, 0x03, 0x9D,
-0xBA, 0x6B, 0xBB, 0xAB, 0xF3, 0xAB, 0x5A, 0xD9, 0xBE, 0xAB, 0xBF, 0xEB, 0xF3, 0xAB, 0x83, 0x96,
-0x78, 0x48, 0x83, 0x52, 0xDE, 0x80, 0x62, 0x08, 0x32, 0x3E, 0x84, 0x80, 0x5E, 0x88, 0x80, 0x40,
-0x83, 0x96, 0x79, 0x88, 0x83, 0x52, 0xDE, 0x80, 0x62, 0x08, 0x3A, 0x7E, 0x84, 0x80, 0x5E, 0x88,
-0x80, 0x40, 0x83, 0x96, 0x7B, 0xC8, 0x83, 0x52, 0xDE, 0x80, 0x62, 0x08, 0x4A, 0x3E, 0x84, 0x80,
-0x5E, 0x88, 0x80, 0x40, 0x83, 0x96, 0x77, 0xC8, 0x83, 0x52, 0xDE, 0x80, 0x62, 0x08, 0x22, 0xFE,
-0x84, 0x80, 0x5E, 0x88, 0x80, 0x40, 0x83, 0x96, 0x7A, 0x88, 0x83, 0x52, 0xDE, 0x80, 0x62, 0x08,
-0x42, 0xFE, 0x84, 0x80, 0x5E, 0x88, 0x80, 0x40, 0x62, 0x08, 0x2A, 0x3E, 0x84, 0x80, 0x80, 0x81,
-0x80, 0xCA, 0x5A, 0xD5, 0xFF, 0x2B, 0x01, 0xF0, 0xDE, 0x80, 0x5E, 0x88, 0xE2, 0xC7, 0x08, 0xF0,
-0x62, 0x02, 0x03, 0x5C, 0xFC, 0xAB, 0xFD, 0xEB, 0xA3, 0x2B, 0xFF, 0x2B, 0xFF, 0x2B, 0x08, 0x40
+0x83, 0x52, 0x5B, 0x15, 0x85, 0xEB, 0x85, 0xEB, 0x85, 0xEB, 0x83, 0x52, 0x5B, 0x5D, 0x89, 0xEB,
+0x8A, 0xEB, 0x8C, 0xEB, 0x96, 0x2B, 0x96, 0x2B, 0x01, 0xF0, 0xDC, 0x40, 0x5C, 0x48, 0xE0, 0x87,
+0x08, 0xF0, 0x60, 0xC2, 0x03, 0x5C, 0x95, 0x2B, 0x96, 0x2B, 0x41, 0xAB, 0x5B, 0x19, 0x99, 0x2B,
+0x9A, 0x2B, 0xFF, 0x2B, 0xE0, 0x01, 0x08, 0xF0, 0x60, 0xC2, 0x03, 0x5C, 0xA0, 0xAB, 0xA1, 0xEB,
+0xA3, 0x2B, 0xFF, 0x2B, 0xFF, 0x2B, 0x01, 0xF0, 0xDC, 0x40, 0x60, 0x0A, 0xA9, 0x2B, 0x03, 0xD0,
+0xDC, 0x0D, 0xFF, 0x7E, 0x03, 0x9D, 0xA7, 0x6B, 0x5C, 0x48, 0x13, 0x45, 0x03, 0x9D, 0xB1, 0x2B,
+0xB2, 0x2B, 0xF3, 0xAB, 0x60, 0xC8, 0x28, 0xFE, 0x84, 0x80, 0x83, 0x93, 0x80, 0x88, 0x03, 0x9D,
+0xBA, 0x6B, 0xBB, 0xAB, 0xF3, 0xAB, 0x5B, 0x19, 0xBE, 0xAB, 0xBF, 0xEB, 0xF3, 0xAB, 0x83, 0x96,
+0x78, 0x48, 0x83, 0x52, 0xDC, 0x40, 0x60, 0xC8, 0x30, 0xFE, 0x84, 0x80, 0x5C, 0x48, 0x80, 0x40,
+0x83, 0x96, 0x79, 0x88, 0x83, 0x52, 0xDC, 0x40, 0x60, 0xC8, 0x38, 0x3E, 0x84, 0x80, 0x5C, 0x48,
+0x80, 0x40, 0x83, 0x96, 0x7B, 0xC8, 0x83, 0x52, 0xDC, 0x40, 0x60, 0xC8, 0x48, 0xFE, 0x84, 0x80,
+0x5C, 0x48, 0x80, 0x40, 0x83, 0x96, 0x77, 0xC8, 0x83, 0x52, 0xDC, 0x40, 0x60, 0xC8, 0x20, 0xBE,
+0x84, 0x80, 0x5C, 0x48, 0x80, 0x40, 0x83, 0x96, 0x7A, 0x88, 0x83, 0x52, 0xDC, 0x40, 0x60, 0xC8,
+0x40, 0xBE, 0x84, 0x80, 0x5C, 0x48, 0x80, 0x40, 0x60, 0xC8, 0x28, 0xFE, 0x84, 0x80, 0x80, 0x81,
+0x80, 0xCA, 0x5B, 0x15, 0xFF, 0x2B, 0x01, 0xF0, 0xDC, 0x40, 0x5C, 0x48, 0xE0, 0x87, 0x08, 0xF0,
+0x60, 0xC2, 0x03, 0x5C, 0xFC, 0xAB, 0xFD, 0xEB, 0xA3, 0x2B, 0xFF, 0x2B, 0xFF, 0x2B, 0x08, 0x40
};
diff --git a/loragw_hal/src/loragw_hal.c b/loragw_hal/src/loragw_hal.c
index fcbc32a..9f9bf8a 100644
--- a/loragw_hal/src/loragw_hal.c
+++ b/loragw_hal/src/loragw_hal.c
@@ -70,7 +70,7 @@ const uint32_t rf_tx_upfreq[LGW_RF_CHAIN_NB] = LGW_RF_TX_UPFREQ;
#define SX1257_RX_LNA_GAIN 1 /* 1 to 6, 1 highest gain */
#define SX1257_RX_BB_GAIN 12 /* 0 to 15 , 15 highest gain */
#define SX1257_RX_ADC_BW 7 /* 0 to 7, 2:100<BW<200, 5:200<BW<400,7:400<BW (kHz) */
-#define SX1257_RX_ADC_TRIM 7 /* 0 to 7, 6 for 32MHz ref, 5 for 36MHz ref */
+#define SX1257_RX_ADC_TRIM 6 /* 0 to 7, 6 for 32MHz ref, 5 for 36MHz ref */
#define SX1257_RXBB_BW 2
#define RSSI_OFFSET_LORA_MULTI -100.0 // TODO: need to find proper value with calibration
@@ -613,7 +613,7 @@ int lgw_start(void) {
lgw_reg_w(LGW_CORR2_DETECT_EN, (if_enable[2] == true) ? lora_multi_sfmask[2] : 0); /* default 0 */
lgw_reg_w(LGW_CORR3_DETECT_EN, (if_enable[3] == true) ? lora_multi_sfmask[3] : 0); /* default 0 */
- lgw_reg_w(LGW_PPM_OFFSET, 0x60); /* if the threshold is 16ms, use 0x60 to enable ppm_offset for SF12 and SF11 @125kHz*/
+ lgw_reg_w(LGW_PPM_OFFSET, 0x60); /* as the threshold is 16ms, use 0x60 to enable ppm_offset for SF12 and SF11 @125kHz*/
lgw_reg_w(LGW_CONCENTRATOR_MODEM_ENABLE,1); /* default 0 */
@@ -895,12 +895,12 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) {
/* metadata 9, CRC, Lora CR & SF */
switch (pkt_data.datarate) {
- case DR_LORA_SF7: buff[9] |= 7; break;
- case DR_LORA_SF8: buff[9] |= 8; break;
- case DR_LORA_SF9: buff[9] |= 9; break;
- case DR_LORA_SF10: buff[9] |= 10; break;
- case DR_LORA_SF11: buff[9] |= 11; break;
- case DR_LORA_SF12: buff[9] |= 12; break;
+ case DR_LORA_SF7: buff[9] = 7; break;
+ case DR_LORA_SF8: buff[9] = 8; break;
+ case DR_LORA_SF9: buff[9] = 9; break;
+ case DR_LORA_SF10: buff[9] = 10; break;
+ case DR_LORA_SF11: buff[9] = 11; break;
+ case DR_LORA_SF12: buff[9] = 12; break;
default: DEBUG_PRINTF("ERROR: UNEXPECTED VALUE %d IN SWITCH STATEMENT\n", pkt_data.datarate);
}
switch (pkt_data.coderate) {
@@ -917,16 +917,22 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) {
/* metadata 10, payload size */
buff[10] = pkt_data.size;
- /* metadata 11, implicit header & modulation bandwidth */
+ /* metadata 11, implicit header, modulation bandwidth, PPM offset & polarity */
switch (pkt_data.bandwidth) {
- case BW_125KHZ: buff[11] |= 0; break;
- case BW_250KHZ: buff[11] |= 1; break;
- case BW_500KHZ: buff[11] |= 2; break;
+ case BW_125KHZ: buff[11] = 0; break;
+ case BW_250KHZ: buff[11] = 1; break;
+ case BW_500KHZ: buff[11] = 2; break;
default: DEBUG_PRINTF("ERROR: UNEXPECTED VALUE %d IN SWITCH STATEMENT\n", pkt_data.bandwidth);
}
if (pkt_data.no_header == true) {
buff[11] |= 0x04; /* set 'implicit header' bit */
}
+ if (SET_PPM_ON(pkt_data.bandwidth,pkt_data.datarate)) {
+ buff[11] |= 0x08; /* set 'PPM offset' bit at 1 */
+ }
+ if (pkt_data.invert_pol == true) {
+ buff[11] |= 0x10; /* set 'TX polarity' bit at 1 */
+ }
/* metadata 12 & 13, Lora preamble size */
if (pkt_data.preamble < MIN_LORA_PREAMBLE) { /* enforce minimum preamble size */
@@ -940,13 +946,6 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) {
buff[14] = 0;
buff[15] = 0;
- /* TODO: need a metadata for PPM offset */
- if (SET_PPM_ON(pkt_data.bandwidth,pkt_data.datarate)) {
- lgw_reg_w(LGW_TX_PPM_OFFSET, 1);
- } else {
- lgw_reg_w(LGW_TX_PPM_OFFSET, 0);
- }
-
} else {
DEBUG_MSG("ERROR: ONLY LORA TX SUPPORTED FOR NOW\n");
return LGW_HAL_ERROR;
@@ -983,4 +982,39 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) {
return LGW_HAL_SUCCESS;
}
+/* ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ */
+
+int lgw_status(uint8_t select, uint8_t *code) {
+ int32_t read_value;
+
+ /* check input variables */
+ CHECK_NULL(code);
+
+ if (select == TX_STATUS) {
+ lgw_reg_r(LGW_TX_STATUS, &read_value);
+ if (lgw_is_started == false) {
+ *code = TX_OFF;
+ } else if ((read_value & 0x70) == 0) {
+ *code = TX_EMPTY;
+ } else if ((read_value & 0x10) != 0) {
+ *code = TX_DELAYED;
+ } else if ((read_value & 0x60) != 0) {
+ *code = TX_EMITTING;
+ } else {
+ *code = TX_STATUS_UNKNOWN;
+ }
+ return LGW_HAL_SUCCESS;
+
+ } else if (select == RX_STATUS) {
+ *code = RX_STATUS_UNKNOWN; /* todo */
+ return LGW_HAL_SUCCESS;
+
+ } else {
+ DEBUG_MSG("ERROR: SELECTION INVALID, NO STATUS TO RETURN\n");
+ return LGW_HAL_ERROR;
+ }
+
+}
+
+
/* --- EOF ------------------------------------------------------------------ */
diff --git a/loragw_hal/src/loragw_reg.c b/loragw_hal/src/loragw_reg.c
index 3026f50..31da925 100644
--- a/loragw_hal/src/loragw_reg.c
+++ b/loragw_hal/src/loragw_reg.c
@@ -47,7 +47,6 @@ struct lgw_reg_s {
uint8_t offs; /*!< position of the register LSB (between 0 to 7) */
bool sign; /*!< 1 indicates the register is signed (2 complem.) */
uint8_t leng; /*!< number of bits in the register */
- char name[40]; /*!< name of the register */
bool rdon; /*!< 1 indicates a read-only register */
int32_t dflt; /*!< register default value */
};
@@ -59,302 +58,308 @@ struct lgw_reg_s {
#define PAGE_MASK 0x03
/*
-auto generated register mapping for C code : 24-Jun-2013 20:29:09
+auto generated register mapping for C code : 11-Jul-2013 13:20:40
this file contains autogenerated C struct used to access the Lora register from the Primer firmware
this file is autogenerated from registers description
-290 registers are defined
+293 registers are defined
*/
const struct lgw_reg_s loregs[LGW_TOTALREGS] = {
- {-1,0,0,0,2,"PAGE_REG",0,0},
- {-1,0,7,0,1,"SOFT_RESET",0,0},
- {-1,1,0,0,8,"VERSION",1,100},
- {-1,2,0,0,16,"RX_DATA_BUF_ADDR",0,0},
- {-1,4,0,0,8,"RX_DATA_BUF_DATA",1,0},
- {-1,5,0,0,8,"TX_DATA_BUF_ADDR",0,0},
- {-1,6,0,0,8,"TX_DATA_BUF_DATA",0,0},
- {-1,7,0,0,8,"CAPTURE_RAM_ADDR",0,0},
- {-1,8,0,0,8,"CAPTURE_RAM_DATA",1,0},
- {-1,9,0,0,8,"MCU_PROM_ADDR",0,0},
- {-1,10,0,0,8,"MCU_PROM_DATA",0,0},
- {-1,11,0,0,8,"RX_PACKET_DATA_FIFO_NUM_STORED",0,0},
- {-1,12,0,0,16,"RX_PACKET_DATA_FIFO_ADDR_POINTER",1,0},
- {-1,14,0,0,8,"RX_PACKET_DATA_FIFO_STATUS",1,0},
- {-1,15,0,0,8,"RX_PACKET_DATA_FIFO_PAYLOAD_SIZE",1,0},
- {-1,16,0,0,1,"MBWSSF_MODEM_ENABLE",0,0},
- {-1,16,1,0,1,"CONCENTRATOR_MODEM_ENABLE",0,0},
- {-1,16,2,0,1,"FSK_MODEM_ENABLE",0,0},
- {-1,17,0,0,1,"CLK32M_EN",0,0},
- {-1,17,1,0,1,"CLKHS_EN",0,0},
- {-1,18,0,0,1,"START_BIST0",0,0},
- {-1,18,1,0,1,"START_BIST1",0,0},
- {-1,18,2,0,1,"CLEAR_BIST0",0,0},
- {-1,18,3,0,1,"CLEAR_BIST1",0,0},
- {-1,19,0,0,1,"BIST0_FINISHED",1,0},
- {-1,19,1,0,1,"BIST1_FINISHED",1,0},
- {-1,20,0,0,1,"MCU_AGC_PROG_RAM_BIST_STATUS",1,0},
- {-1,20,1,0,1,"MCU_ARB_PROG_RAM_BIST_STATUS",1,0},
- {-1,20,2,0,1,"CAPTURE_RAM_BIST_STATUS",1,0},
- {-1,20,3,0,1,"CHAN_FIR_RAM0_BIST_STATUS",1,0},
- {-1,20,4,0,1,"CHAN_FIR_RAM1_BIST_STATUS",1,0},
- {-1,21,0,0,1,"CORR0_RAM_BIST_STATUS",1,0},
- {-1,21,1,0,1,"CORR1_RAM_BIST_STATUS",1,0},
- {-1,21,2,0,1,"CORR2_RAM_BIST_STATUS",1,0},
- {-1,21,3,0,1,"CORR3_RAM_BIST_STATUS",1,0},
- {-1,21,4,0,1,"CORR4_RAM_BIST_STATUS",1,0},
- {-1,21,5,0,1,"CORR5_RAM_BIST_STATUS",1,0},
- {-1,21,6,0,1,"CORR6_RAM_BIST_STATUS",1,0},
- {-1,21,7,0,1,"CORR7_RAM_BIST_STATUS",1,0},
- {-1,22,0,0,1,"MODEM0_RAM0_BIST_STATUS",1,0},
- {-1,22,1,0,1,"MODEM1_RAM0_BIST_STATUS",1,0},
- {-1,22,2,0,1,"MODEM2_RAM0_BIST_STATUS",1,0},
- {-1,22,3,0,1,"MODEM3_RAM0_BIST_STATUS",1,0},
- {-1,22,4,0,1,"MODEM4_RAM0_BIST_STATUS",1,0},
- {-1,22,5,0,1,"MODEM5_RAM0_BIST_STATUS",1,0},
- {-1,22,6,0,1,"MODEM6_RAM0_BIST_STATUS",1,0},
- {-1,22,7,0,1,"MODEM7_RAM0_BIST_STATUS",1,0},
- {-1,23,0,0,1,"MODEM0_RAM1_BIST_STATUS",1,0},
- {-1,23,1,0,1,"MODEM1_RAM1_BIST_STATUS",1,0},
- {-1,23,2,0,1,"MODEM2_RAM1_BIST_STATUS",1,0},
- {-1,23,3,0,1,"MODEM3_RAM1_BIST_STATUS",1,0},
- {-1,23,4,0,1,"MODEM4_RAM1_BIST_STATUS",1,0},
- {-1,23,5,0,1,"MODEM5_RAM1_BIST_STATUS",1,0},
- {-1,23,6,0,1,"MODEM6_RAM1_BIST_STATUS",1,0},
- {-1,23,7,0,1,"MODEM7_RAM1_BIST_STATUS",1,0},
- {-1,24,0,0,1,"MODEM0_RAM2_BIST_STATUS",1,0},
- {-1,24,1,0,1,"MODEM1_RAM2_BIST_STATUS",1,0},
- {-1,24,2,0,1,"MODEM2_RAM2_BIST_STATUS",1,0},
- {-1,24,3,0,1,"MODEM3_RAM2_BIST_STATUS",1,0},
- {-1,24,4,0,1,"MODEM4_RAM2_BIST_STATUS",1,0},
- {-1,24,5,0,1,"MODEM5_RAM2_BIST_STATUS",1,0},
- {-1,24,6,0,1,"MODEM6_RAM2_BIST_STATUS",1,0},
- {-1,24,7,0,1,"MODEM7_RAM2_BIST_STATUS",1,0},
- {-1,25,0,0,1,"MODEM_MBWSSF_RAM0_BIST_STATUS",1,0},
- {-1,25,1,0,1,"MODEM_MBWSSF_RAM1_BIST_STATUS",1,0},
- {-1,25,2,0,1,"MODEM_MBWSSF_RAM2_BIST_STATUS",1,0},
- {-1,26,0,0,1,"MCU_AGC_DATA_RAM_BIST0_STATUS",1,0},
- {-1,26,1,0,1,"MCU_AGC_DATA_RAM_BIST1_STATUS",1,0},
- {-1,26,2,0,1,"MCU_ARB_DATA_RAM_BIST0_STATUS",1,0},
- {-1,26,3,0,1,"MCU_ARB_DATA_RAM_BIST1_STATUS",1,0},
- {-1,26,4,0,1,"TX_TOP_RAM_BIST0_STATUS",1,0},
- {-1,26,5,0,1,"TX_TOP_RAM_BIST1_STATUS",1,0},
- {-1,26,6,0,1,"DATA_MNGT_RAM_BIST0_STATUS",1,0},
- {-1,26,7,0,1,"DATA_MNGT_RAM_BIST1_STATUS",1,0},
- {-1,27,0,0,8,"GPIO_SELECT",0,0},
- {-1,28,0,0,8,"GPIO_MUX",0,0},
- {-1,127,0,0,1,"EMERGENCY_FORCE_HOST_CTRL",0,0},
- {0,29,0,0,1,"RX_INVERT_IQ",0,0},
- {0,29,1,0,1,"MODEM_INVERT_IQ",0,1},
- {0,29,2,0,1,"MBWSSF_MODEM_INVERT_IQ",0,0},
- {0,29,3,0,1,"RX_EDGE_SELECT",0,0},
- {0,29,4,0,1,"MISC_RADIO_EN",0,0},
- {0,30,0,0,4,"FILTER_GAIN",0,7},
- {0,31,0,0,8,"RADIO_SELECT",0,240},
- {0,32,0,1,13,"IF_FREQ_0",0,-384},
- {0,34,0,1,13,"IF_FREQ_1",0,-128},
- {0,36,0,1,13,"IF_FREQ_2",0,128},
- {0,38,0,1,13,"IF_FREQ_3",0,384},
- {0,40,0,1,13,"IF_FREQ_4",0,-384},
- {0,42,0,1,13,"IF_FREQ_5",0,-128},
- {0,44,0,1,13,"IF_FREQ_6",0,128},
- {0,46,0,1,13,"IF_FREQ_7",0,384},
- {0,48,0,1,13,"IF_FREQ_8",0,0},
- {0,50,0,1,13,"IF_FREQ_9",0,0},
- {0,60,0,0,1,"CHANN_OVERRIDE_AGC_GAIN",0,0},
- {0,60,1,0,4,"CHANN_AGC_GAIN",0,7},
- {0,61,0,0,7,"CORR0_DETECT_EN",0,0},
- {0,62,0,0,7,"CORR1_DETECT_EN",0,0},
- {0,63,0,0,7,"CORR2_DETECT_EN",0,0},
- {0,64,0,0,7,"CORR3_DETECT_EN",0,0},
- {0,65,0,0,7,"CORR4_DETECT_EN",0,0},
- {0,66,0,0,7,"CORR5_DETECT_EN",0,0},
- {0,67,0,0,7,"CORR6_DETECT_EN",0,0},
- {0,68,0,0,7,"CORR7_DETECT_EN",0,0},
- {0,69,0,0,1,"CORR_SAME_PEAKS_OPTION_SF6",0,0},
- {0,69,1,0,1,"CORR_SAME_PEAKS_OPTION_SF7",0,1},
- {0,69,2,0,1,"CORR_SAME_PEAKS_OPTION_SF8",0,1},
- {0,69,3,0,1,"CORR_SAME_PEAKS_OPTION_SF9",0,1},
- {0,69,4,0,1,"CORR_SAME_PEAKS_OPTION_SF10",0,1},
- {0,69,5,0,1,"CORR_SAME_PEAKS_OPTION_SF11",0,1},
- {0,69,6,0,1,"CORR_SAME_PEAKS_OPTION_SF12",0,1},
- {0,70,0,0,4,"CORR_SIG_NOISE_RATIO_SF6",0,4},
- {0,70,4,0,4,"CORR_SIG_NOISE_RATIO_SF7",0,4},
- {0,71,0,0,4,"CORR_SIG_NOISE_RATIO_SF8",0,4},
- {0,71,4,0,4,"CORR_SIG_NOISE_RATIO_SF9",0,4},
- {0,72,0,0,4,"CORR_SIG_NOISE_RATIO_SF10",0,4},
- {0,72,4,0,4,"CORR_SIG_NOISE_RATIO_SF11",0,4},
- {0,73,0,0,4,"CORR_SIG_NOISE_RATIO_SF12",0,4},
- {0,74,0,0,4,"CORR_NUM_SAME_PEAK",0,4},
- {0,74,4,0,3,"CORR_MAC_GAIN",0,5},
- {0,75,0,0,12,"ADJUST_MODEM_START_OFFSET_RDX8",0,0},
- {0,77,0,0,12,"ADJUST_MODEM_START_OFFSET_RDX4",0,0},
- {0,79,0,0,12,"ADJUST_MODEM_START_OFFSET_SF12_RDX4",0,4092},
- {0,81,0,0,8,"DBG_CORR_SELECT_SF",0,7},
- {0,82,0,0,8,"DBG_CORR_SELECT_CHANNEL",0,0},
- {0,83,0,0,8,"DBG_DETECT_CPT",1,0},
- {0,84,0,0,8,"DBG_SYMB_CPT",1,0},
- {0,85,0,0,1,"CHIRP_INVERT_RX",0,1},
- {0,85,1,0,1,"DC_NOTCH_EN",0,0},
- {0,86,0,0,1,"IMPLICIT_CRC_EN",0,0},
- {0,86,1,0,3,"IMPLICIT_CODING_RATE",0,0},
- {0,87,0,0,8,"IMPLICIT_PAYLOAD_LENGHT",0,0},
- {0,88,0,0,8,"FREQ_TO_TIME_INVERT",0,29},
- {0,89,0,0,6,"FREQ_TO_TIME_DRIFT",0,9},
- {0,90,0,0,2,"PAYLOAD_FINE_TIMING_GAIN",0,2},
- {0,90,2,0,2,"PREAMBLE_FINE_TIMING_GAIN",0,1},
- {0,90,4,0,2,"TRACKING_INTEGRAL",0,0},
- {0,91,0,0,4,"FRAME_SYNCH_PEAK1_POS",0,1},
- {0,91,4,0,4,"FRAME_SYNCH_PEAK2_POS",0,2},
- {0,92,0,0,16,"PREAMBLE_SYMB1_NB",0,10},
- {0,94,0,0,1,"FRAME_SYNCH_GAIN",0,1},
- {0,94,1,0,1,"SYNCH_DETECT_TH",0,1},
- {0,95,0,0,4,"LLR_SCALE",0,8},
- {0,95,4,0,2,"SNR_AVG_CST",0,2},
- {0,96,0,0,7,"PPM_OFFSET",0,0},
- {0,97,0,0,8,"MAX_PAYLOAD_LEN",0,255},
- {0,98,0,0,1,"ONLY_CRC_EN",0,1},
- {0,99,0,0,8,"ZERO_PAD",0,0},
- {0,100,0,0,4,"DEC_GAIN_OFFSET",0,8},
- {0,101,0,0,1,"FORCE_HOST_REG_CTRL",0,1},
- {0,101,1,0,1,"FORCE_HOST_RADIO_CTRL",0,1},
- {0,101,2,0,1,"FORCE_HOST_FE_CTRL",0,1},
- {0,101,3,0,1,"FORCE_DEC_FILTER_GAIN",0,1},
- {0,102,0,0,1,"MCU_RST_0",0,1},
- {0,102,1,0,1,"MCU_RST_1",0,1},
- {0,102,2,0,1,"MCU_SELECT_MUX_0",0,0},
- {0,102,3,0,1,"MCU_SELECT_MUX_1",0,0},
- {0,102,4,0,1,"MCU_CORRUPTION_DETECTED_0",1,0},
- {0,102,5,0,1,"MCU_CORRUPTION_DETECTED_1",1,0},
- {0,103,0,0,8,"CHANN_SELECT_RSSI",0,1},
- {0,104,0,0,8,"RSSI_BB_DEFAULT_VALUE",0,32},
- {0,105,0,0,8,"RSSI_DEC_DEFAULT_VALUE",0,100},
- {0,106,0,0,8,"RSSI_CHANN_DEFAULT_VALUE",0,100},
- {0,107,0,0,5,"RSSI_BB_FILTER_ALPHA",0,7},
- {0,108,0,0,5,"RSSI_DEC_FILTER_ALPHA",0,5},
- {0,109,0,0,5,"RSSI_CHANN_FILTER_ALPHA",0,8},
- {0,110,0,0,6,"IQ_MISMATCH_A_AMP_COEFF",0,0},
- {0,111,0,0,6,"IQ_MISMATCH_A_PHI_COEFF",0,0},
- {0,112,0,0,6,"IQ_MISMATCH_B_AMP_COEFF",0,0},
- {0,112,6,0,1,"IQ_MISMATCH_B_SEL_I",0,0},
- {0,113,0,0,6,"IQ_MISMATCH_B_PHI_COEFF",0,0},
- {1,29,0,0,1,"TX_TRIG_IMMEDIATE",0,0},
- {1,29,1,0,1,"TX_TRIG_DELAYED",0,0},
- {1,29,2,0,1,"TX_TRIG_GPS",0,0},
- {1,30,0,0,16,"TX_START_DELAY",0,0},
- {1,32,0,0,4,"TX_FRAME_SYNCH_PEAK1_POS",0,1},
- {1,32,4,0,4,"TX_FRAME_SYNCH_PEAK2_POS",0,2},
- {1,33,0,0,16,"TX_PREAMBLE_SYMB1_NB",0,10},
- {1,35,0,0,8,"TX_OFFSET_I",0,0},
- {1,36,0,0,8,"TX_OFFSET_Q",0,0},
- {1,37,0,0,1,"TX_MODE",0,0},
- {1,37,1,0,4,"TX_ZERO_PAD",0,0},
- {1,37,5,0,1,"TX_PPM_OFFSET",0,0},
- {1,37,6,0,1,"TX_CHIRP_INVERT",0,0},
- {1,37,7,0,1,"TX_CONT_CHIRP",0,0},
- {1,38,0,0,2,"TX_GAIN",0,0},
- {1,38,2,0,3,"TX_CHIRP_LOW_PASS",0,0},
- {1,38,5,0,2,"TX_FCC_WIDEBAND",0,0},
- {1,38,7,0,1,"TX_SWAP_IQ",0,0},
- {1,39,0,0,1,"MBWSSF_IMPLICIT_HEADER",0,0},
- {1,39,1,0,1,"MBWSSF_IMPLICIT_CRC_EN",0,0},
- {1,39,2,0,3,"MBWSSF_IMPLICIT_CODING_RATE",0,0},
- {1,40,0,0,8,"MBWSSF_IMPLICIT_PAYLOAD_LENGHT",0,0},
- {1,41,0,0,1,"MBWSSF_AGC_FREEZE_ON_DETECT",0,1},
- {1,42,0,0,4,"MBWSSF_FRAME_SYNCH_PEAK1_POS",0,1},
- {1,42,4,0,4,"MBWSSF_FRAME_SYNCH_PEAK2_POS",0,2},
- {1,43,0,0,16,"MBWSSF_PREAMBLE_SYMB1_NB",0,10},
- {1,45,0,0,1,"MBWSSF_FRAME_SYNCH_GAIN",0,1},
- {1,45,1,0,1,"MBWSSF_SYNCH_DETECT_TH",0,1},
- {1,46,0,0,8,"MBWSSF_DETECT_MIN_SINGLE_PEAK",0,10},
- {1,47,0,0,3,"MBWSSF_DETECT_TRIG_SAME_PEAK_NB",0,3},
- {1,48,0,0,8,"MBWSSF_FREQ_TO_TIME_INVERT",0,29},
- {1,49,0,0,6,"MBWSSF_FREQ_TO_TIME_DRIFT",0,36},
- {1,50,0,0,12,"MBWSSF_PPM_CORRECTION",0,0},
- {1,52,0,0,2,"MBWSSF_PAYLOAD_FINE_TIMING_GAIN",0,2},
- {1,52,2,0,2,"MBWSSF_PREAMBLE_FINE_TIMING_GAIN",0,1},
- {1,52,4,0,2,"MBWSSF_TRACKING_INTEGRAL",0,0},
- {1,53,0,0,8,"MBWSSF_ZERO_PAD",0,0},
- {1,54,0,0,2,"MBWSSF_MODEM_BW",0,0},
- {1,54,2,0,1,"MBWSSF_RADIO_SELECT",0,0},
- {1,54,3,0,1,"MBWSSF_RX_CHIRP_INVERT",0,1},
- {1,55,0,0,4,"MBWSSF_LLR_SCALE",0,8},
- {1,55,4,0,2,"MBWSSF_SNR_AVG_CST",0,3},
- {1,55,6,0,1,"MBWSSF_PPM_OFFSET",0,0},
- {1,56,0,0,4,"MBWSSF_RATE_SF",0,7},
- {1,56,4,0,1,"MBWSSF_ONLY_CRC_EN",0,1},
- {1,57,0,0,8,"MBWSSF_MAX_PAYLOAD_LEN",0,255},
- {2,29,0,0,8,"SPI_RADIO_A__DATA",0,0},
- {2,30,0,0,8,"SPI_RADIO_A__DATA_READBACK",1,0},
- {2,31,0,0,14,"SPI_RADIO_A__ADDR",0,0},
- {2,33,0,0,1,"SPI_RADIO_A__CS",0,0},
- {2,34,0,0,8,"SPI_RADIO_B__DATA",0,0},
- {2,35,0,0,8,"SPI_RADIO_B__DATA_READBACK",1,0},
- {2,36,0,0,14,"SPI_RADIO_B__ADDR",0,0},
- {2,38,0,0,1,"SPI_RADIO_B__CS",0,0},
- {2,39,0,0,1,"RADIO_A_EN",0,0},
- {2,39,1,0,1,"RADIO_B_EN",0,0},
- {2,39,2,0,1,"RADIO_RST",0,1},
- {2,39,3,0,1,"LNA_A_EN",0,0},
- {2,39,4,0,1,"PA_A_EN",0,0},
- {2,39,5,0,1,"LNA_B_EN",0,0},
- {2,39,6,0,1,"PA_B_EN",0,0},
- {2,40,0,0,2,"PA_A_GAIN",0,0},
- {2,40,2,0,2,"PA_B_GAIN",0,0},
- {2,41,0,0,4,"LNA_A_CTRL_LUT",0,2},
- {2,41,4,0,4,"PA_A_CTRL_LUT",0,4},
- {2,42,0,0,4,"LNA_B_CTRL_LUT",0,2},
- {2,42,4,0,4,"PA_B_CTRL_LUT",0,4},
- {2,43,0,0,5,"CAPTURE_SOURCE",0,0},
- {2,43,5,0,1,"CAPTURE_START",0,0},
- {2,43,6,0,1,"CAPTURE_FORCE_TRIGGER",0,0},
- {2,43,7,0,1,"CAPTURE_WRAP",0,0},
- {2,44,0,0,16,"CAPTURE_PERIOD",0,0},
- {2,46,0,0,3,"LED_REG",0,3},
- {2,47,0,0,8,"MODEM_STATUS",1,0},
- {2,48,0,0,8,"VALID_HEADER_COUNTER_0",1,0},
- {2,49,0,0,8,"VALID_HEADER_COUNTER_1",1,0},
- {2,50,0,0,8,"VALID_PACKET_COUNTER_0",1,0},
- {2,51,0,0,8,"VALID_PACKET_COUNTER_1",1,0},
- {2,52,0,0,8,"VALID_HEADER_COUNTER_MBWSSF",1,0},
- {2,53,0,0,8,"VALID_HEADER_COUNTER_FSK",1,0},
- {2,54,0,0,8,"VALID_PACKET_COUNTER_MBWSSF",1,0},
- {2,55,0,0,8,"VALID_PACKET_COUNTER_FSK",1,0},
- {2,56,0,0,8,"CHANN_RSSI",1,0},
- {2,57,0,0,8,"BB_RSSI",1,0},
- {2,58,0,0,8,"DEC_RSSI",1,0},
- {2,59,0,0,8,"DBG_MCU_DATA",1,0},
- {2,60,0,0,8,"DBG_ARB_MCU_RAM_DATA",1,0},
- {2,61,0,0,8,"DBG_AGC_MCU_RAM_DATA",1,0},
- {2,62,0,0,16,"NEXT_PACKET_CNT",1,0},
- {2,64,0,0,16,"ADDR_CAPTURE_COUNT",1,0},
- {2,66,0,0,32,"TIMESTAMP",1,0},
- {2,70,0,0,4,"DBG_CHANN0_GAIN",1,0},
- {2,70,4,0,4,"DBG_CHANN1_GAIN",1,0},
- {2,71,0,0,4,"DBG_CHANN2_GAIN",1,0},
- {2,71,4,0,4,"DBG_CHANN3_GAIN",1,0},
- {2,72,0,0,4,"DBG_CHANN4_GAIN",1,0},
- {2,72,4,0,4,"DBG_CHANN5_GAIN",1,0},
- {2,73,0,0,4,"DBG_CHANN6_GAIN",1,0},
- {2,73,4,0,4,"DBG_CHANN7_GAIN",1,0},
- {2,74,0,0,4,"DBG_DEC_FILT_GAIN",1,0},
- {2,75,0,0,3,"SPI_DATA_FIFO_PTR",1,0},
- {2,75,3,0,3,"PACKET_DATA_FIFO_PTR",1,0},
- {2,76,0,0,8,"DBG_ARB_MCU_RAM_ADDR",0,0},
- {2,77,0,0,8,"DBG_AGC_MCU_RAM_ADDR",0,0},
- {2,78,0,0,1,"SPI_MASTER_CHIP_SELECT_POLARITY",0,0},
- {2,78,1,0,1,"SPI_MASTER_CPOL",0,0},
- {2,78,2,0,1,"SPI_MASTER_CPHA",0,0},
- {2,79,0,0,1,"SIG_GEN_ANALYSER_MUX_SEL",0,0},
- {2,80,0,0,1,"SIG_GEN_EN",0,0},
- {2,80,1,0,1,"SIG_ANALYSER_EN",0,0},
- {2,80,2,0,2,"SIG_ANALYSER_AVG_LEN",0,0},
- {2,80,4,0,3,"SIG_ANALYSER_PRECISION",0,0},
- {2,80,7,0,1,"SIG_ANALYSER_VALID_OUT",1,0},
- {2,81,0,0,8,"SIG_GEN_FREQ",0,0},
- {2,82,0,0,8,"SIG_ANALYSER_FREQ",0,0},
- {2,83,0,0,8,"SIG_ANALYSER_I_OUT",1,0},
- {2,84,0,0,8,"SIG_ANALYSER_Q_OUT",1,0},
- {2,85,0,0,1,"GPS_EN",0,0},
- {2,85,1,0,1,"GPS_POL",0,1}
+ {-1,0,0,0,2,0,0}, /* PAGE_REG */
+ {-1,0,7,0,1,0,0}, /* SOFT_RESET */
+ {-1,1,0,0,8,1,101}, /* VERSION */
+ {-1,2,0,0,16,0,0}, /* RX_DATA_BUF_ADDR */
+ {-1,4,0,0,8,0,0}, /* RX_DATA_BUF_DATA */
+ {-1,5,0,0,8,0,0}, /* TX_DATA_BUF_ADDR */
+ {-1,6,0,0,8,0,0}, /* TX_DATA_BUF_DATA */
+ {-1,7,0,0,8,0,0}, /* CAPTURE_RAM_ADDR */
+ {-1,8,0,0,8,1,0}, /* CAPTURE_RAM_DATA */
+ {-1,9,0,0,8,0,0}, /* MCU_PROM_ADDR */
+ {-1,10,0,0,8,0,0}, /* MCU_PROM_DATA */
+ {-1,11,0,0,8,0,0}, /* RX_PACKET_DATA_FIFO_NUM_STORED */
+ {-1,12,0,0,16,1,0}, /* RX_PACKET_DATA_FIFO_ADDR_POINTER */
+ {-1,14,0,0,8,1,0}, /* RX_PACKET_DATA_FIFO_STATUS */
+ {-1,15,0,0,8,1,0}, /* RX_PACKET_DATA_FIFO_PAYLOAD_SIZE */
+ {-1,16,0,0,1,0,0}, /* MBWSSF_MODEM_ENABLE */
+ {-1,16,1,0,1,0,0}, /* CONCENTRATOR_MODEM_ENABLE */
+ {-1,16,2,0,1,0,0}, /* FSK_MODEM_ENABLE */
+ {-1,17,0,0,1,0,0}, /* CLK32M_EN */
+ {-1,17,1,0,1,0,0}, /* CLKHS_EN */
+ {-1,18,0,0,1,0,0}, /* START_BIST0 */
+ {-1,18,1,0,1,0,0}, /* START_BIST1 */
+ {-1,18,2,0,1,0,0}, /* CLEAR_BIST0 */
+ {-1,18,3,0,1,0,0}, /* CLEAR_BIST1 */
+ {-1,19,0,0,1,1,0}, /* BIST0_FINISHED */
+ {-1,19,1,0,1,1,0}, /* BIST1_FINISHED */
+ {-1,20,0,0,1,1,0}, /* MCU_AGC_PROG_RAM_BIST_STATUS */
+ {-1,20,1,0,1,1,0}, /* MCU_ARB_PROG_RAM_BIST_STATUS */
+ {-1,20,2,0,1,1,0}, /* CAPTURE_RAM_BIST_STATUS */
+ {-1,20,3,0,1,1,0}, /* CHAN_FIR_RAM0_BIST_STATUS */
+ {-1,20,4,0,1,1,0}, /* CHAN_FIR_RAM1_BIST_STATUS */
+ {-1,21,0,0,1,1,0}, /* CORR0_RAM_BIST_STATUS */
+ {-1,21,1,0,1,1,0}, /* CORR1_RAM_BIST_STATUS */
+ {-1,21,2,0,1,1,0}, /* CORR2_RAM_BIST_STATUS */
+ {-1,21,3,0,1,1,0}, /* CORR3_RAM_BIST_STATUS */
+ {-1,21,4,0,1,1,0}, /* CORR4_RAM_BIST_STATUS */
+ {-1,21,5,0,1,1,0}, /* CORR5_RAM_BIST_STATUS */
+ {-1,21,6,0,1,1,0}, /* CORR6_RAM_BIST_STATUS */
+ {-1,21,7,0,1,1,0}, /* CORR7_RAM_BIST_STATUS */
+ {-1,22,0,0,1,1,0}, /* MODEM0_RAM0_BIST_STATUS */
+ {-1,22,1,0,1,1,0}, /* MODEM1_RAM0_BIST_STATUS */
+ {-1,22,2,0,1,1,0}, /* MODEM2_RAM0_BIST_STATUS */
+ {-1,22,3,0,1,1,0}, /* MODEM3_RAM0_BIST_STATUS */
+ {-1,22,4,0,1,1,0}, /* MODEM4_RAM0_BIST_STATUS */
+ {-1,22,5,0,1,1,0}, /* MODEM5_RAM0_BIST_STATUS */
+ {-1,22,6,0,1,1,0}, /* MODEM6_RAM0_BIST_STATUS */
+ {-1,22,7,0,1,1,0}, /* MODEM7_RAM0_BIST_STATUS */
+ {-1,23,0,0,1,1,0}, /* MODEM0_RAM1_BIST_STATUS */
+ {-1,23,1,0,1,1,0}, /* MODEM1_RAM1_BIST_STATUS */
+ {-1,23,2,0,1,1,0}, /* MODEM2_RAM1_BIST_STATUS */
+ {-1,23,3,0,1,1,0}, /* MODEM3_RAM1_BIST_STATUS */
+ {-1,23,4,0,1,1,0}, /* MODEM4_RAM1_BIST_STATUS */
+ {-1,23,5,0,1,1,0}, /* MODEM5_RAM1_BIST_STATUS */
+ {-1,23,6,0,1,1,0}, /* MODEM6_RAM1_BIST_STATUS */
+ {-1,23,7,0,1,1,0}, /* MODEM7_RAM1_BIST_STATUS */
+ {-1,24,0,0,1,1,0}, /* MODEM0_RAM2_BIST_STATUS */
+ {-1,24,1,0,1,1,0}, /* MODEM1_RAM2_BIST_STATUS */
+ {-1,24,2,0,1,1,0}, /* MODEM2_RAM2_BIST_STATUS */
+ {-1,24,3,0,1,1,0}, /* MODEM3_RAM2_BIST_STATUS */
+ {-1,24,4,0,1,1,0}, /* MODEM4_RAM2_BIST_STATUS */
+ {-1,24,5,0,1,1,0}, /* MODEM5_RAM2_BIST_STATUS */
+ {-1,24,6,0,1,1,0}, /* MODEM6_RAM2_BIST_STATUS */
+ {-1,24,7,0,1,1,0}, /* MODEM7_RAM2_BIST_STATUS */
+ {-1,25,0,0,1,1,0}, /* MODEM_MBWSSF_RAM0_BIST_STATUS */
+ {-1,25,1,0,1,1,0}, /* MODEM_MBWSSF_RAM1_BIST_STATUS */
+ {-1,25,2,0,1,1,0}, /* MODEM_MBWSSF_RAM2_BIST_STATUS */
+ {-1,26,0,0,1,1,0}, /* MCU_AGC_DATA_RAM_BIST0_STATUS */
+ {-1,26,1,0,1,1,0}, /* MCU_AGC_DATA_RAM_BIST1_STATUS */
+ {-1,26,2,0,1,1,0}, /* MCU_ARB_DATA_RAM_BIST0_STATUS */
+ {-1,26,3,0,1,1,0}, /* MCU_ARB_DATA_RAM_BIST1_STATUS */
+ {-1,26,4,0,1,1,0}, /* TX_TOP_RAM_BIST0_STATUS */
+ {-1,26,5,0,1,1,0}, /* TX_TOP_RAM_BIST1_STATUS */
+ {-1,26,6,0,1,1,0}, /* DATA_MNGT_RAM_BIST0_STATUS */
+ {-1,26,7,0,1,1,0}, /* DATA_MNGT_RAM_BIST1_STATUS */
+ {-1,27,0,0,4,0,0}, /* GPIO_SELECT_INPUT */
+ {-1,28,0,0,4,0,0}, /* GPIO_SELECT_OUTPUT */
+ {-1,29,0,0,5,0,0}, /* GPIO_MODE */
+ {-1,30,0,0,5,1,0}, /* GPIO_PIN_REG_IN */
+ {-1,31,0,0,5,0,0}, /* GPIO_PIN_REG_OUT */
+ {-1,32,0,0,8,0,0}, /* MCU_AGC_STATUS */
+ {-1,126,0,0,8,1,1}, /* CHIP_ID */
+ {-1,127,0,0,1,0,0}, /* EMERGENCY_FORCE_HOST_CTRL */
+ {0,33,0,0,1,0,0}, /* RX_INVERT_IQ */
+ {0,33,1,0,1,0,1}, /* MODEM_INVERT_IQ */
+ {0,33,2,0,1,0,0}, /* MBWSSF_MODEM_INVERT_IQ */
+ {0,33,3,0,1,0,0}, /* RX_EDGE_SELECT */
+ {0,33,4,0,1,0,0}, /* MISC_RADIO_EN */
+ {0,34,0,0,4,0,7}, /* FILTER_GAIN */
+ {0,35,0,0,8,0,240}, /* RADIO_SELECT */
+ {0,36,0,1,13,0,-384}, /* IF_FREQ_0 */
+ {0,38,0,1,13,0,-128}, /* IF_FREQ_1 */
+ {0,40,0,1,13,0,128}, /* IF_FREQ_2 */
+ {0,42,0,1,13,0,384}, /* IF_FREQ_3 */
+ {0,44,0,1,13,0,-384}, /* IF_FREQ_4 */
+ {0,46,0,1,13,0,-128}, /* IF_FREQ_5 */
+ {0,48,0,1,13,0,128}, /* IF_FREQ_6 */
+ {0,50,0,1,13,0,384}, /* IF_FREQ_7 */
+ {0,52,0,1,13,0,0}, /* IF_FREQ_8 */
+ {0,54,0,1,13,0,0}, /* IF_FREQ_9 */
+ {0,64,0,0,1,0,0}, /* CHANN_OVERRIDE_AGC_GAIN */
+ {0,64,1,0,4,0,7}, /* CHANN_AGC_GAIN */
+ {0,65,0,0,7,0,0}, /* CORR0_DETECT_EN */
+ {0,66,0,0,7,0,0}, /* CORR1_DETECT_EN */
+ {0,67,0,0,7,0,0}, /* CORR2_DETECT_EN */
+ {0,68,0,0,7,0,0}, /* CORR3_DETECT_EN */
+ {0,69,0,0,7,0,0}, /* CORR4_DETECT_EN */
+ {0,70,0,0,7,0,0}, /* CORR5_DETECT_EN */
+ {0,71,0,0,7,0,0}, /* CORR6_DETECT_EN */
+ {0,72,0,0,7,0,0}, /* CORR7_DETECT_EN */
+ {0,73,0,0,1,0,0}, /* CORR_SAME_PEAKS_OPTION_SF6 */
+ {0,73,1,0,1,0,1}, /* CORR_SAME_PEAKS_OPTION_SF7 */
+ {0,73,2,0,1,0,1}, /* CORR_SAME_PEAKS_OPTION_SF8 */
+ {0,73,3,0,1,0,1}, /* CORR_SAME_PEAKS_OPTION_SF9 */
+ {0,73,4,0,1,0,1}, /* CORR_SAME_PEAKS_OPTION_SF10 */
+ {0,73,5,0,1,0,1}, /* CORR_SAME_PEAKS_OPTION_SF11 */
+ {0,73,6,0,1,0,1}, /* CORR_SAME_PEAKS_OPTION_SF12 */
+ {0,74,0,0,4,0,4}, /* CORR_SIG_NOISE_RATIO_SF6 */
+ {0,74,4,0,4,0,4}, /* CORR_SIG_NOISE_RATIO_SF7 */
+ {0,75,0,0,4,0,4}, /* CORR_SIG_NOISE_RATIO_SF8 */
+ {0,75,4,0,4,0,4}, /* CORR_SIG_NOISE_RATIO_SF9 */
+ {0,76,0,0,4,0,4}, /* CORR_SIG_NOISE_RATIO_SF10 */
+ {0,76,4,0,4,0,4}, /* CORR_SIG_NOISE_RATIO_SF11 */
+ {0,77,0,0,4,0,4}, /* CORR_SIG_NOISE_RATIO_SF12 */
+ {0,78,0,0,4,0,4}, /* CORR_NUM_SAME_PEAK */
+ {0,78,4,0,3,0,5}, /* CORR_MAC_GAIN */
+ {0,79,0,0,12,0,0}, /* ADJUST_MODEM_START_OFFSET_RDX8 */
+ {0,81,0,0,12,0,0}, /* ADJUST_MODEM_START_OFFSET_RDX4 */
+ {0,83,0,0,12,0,4092}, /* ADJUST_MODEM_START_OFFSET_SF12_RDX4 */
+ {0,85,0,0,8,0,7}, /* DBG_CORR_SELECT_SF */
+ {0,86,0,0,8,0,0}, /* DBG_CORR_SELECT_CHANNEL */
+ {0,87,0,0,8,1,0}, /* DBG_DETECT_CPT */
+ {0,88,0,0,8,1,0}, /* DBG_SYMB_CPT */
+ {0,89,0,0,1,0,1}, /* CHIRP_INVERT_RX */
+ {0,89,1,0,1,0,0}, /* DC_NOTCH_EN */
+ {0,90,0,0,1,0,0}, /* IMPLICIT_CRC_EN */
+ {0,90,1,0,3,0,0}, /* IMPLICIT_CODING_RATE */
+ {0,91,0,0,8,0,0}, /* IMPLICIT_PAYLOAD_LENGHT */
+ {0,92,0,0,8,0,29}, /* FREQ_TO_TIME_INVERT */
+ {0,93,0,0,6,0,9}, /* FREQ_TO_TIME_DRIFT */
+ {0,94,0,0,2,0,2}, /* PAYLOAD_FINE_TIMING_GAIN */
+ {0,94,2,0,2,0,1}, /* PREAMBLE_FINE_TIMING_GAIN */
+ {0,94,4,0,2,0,0}, /* TRACKING_INTEGRAL */
+ {0,95,0,0,4,0,1}, /* FRAME_SYNCH_PEAK1_POS */
+ {0,95,4,0,4,0,2}, /* FRAME_SYNCH_PEAK2_POS */
+ {0,96,0,0,16,0,10}, /* PREAMBLE_SYMB1_NB */
+ {0,98,0,0,1,0,1}, /* FRAME_SYNCH_GAIN */
+ {0,98,1,0,1,0,1}, /* SYNCH_DETECT_TH */
+ {0,99,0,0,4,0,8}, /* LLR_SCALE */
+ {0,99,4,0,2,0,2}, /* SNR_AVG_CST */
+ {0,100,0,0,7,0,0}, /* PPM_OFFSET */
+ {0,101,0,0,8,0,255}, /* MAX_PAYLOAD_LEN */
+ {0,102,0,0,1,0,1}, /* ONLY_CRC_EN */
+ {0,103,0,0,8,0,0}, /* ZERO_PAD */
+ {0,104,0,0,4,0,8}, /* DEC_GAIN_OFFSET */
+ {0,104,4,0,4,0,7}, /* CHAN_GAIN_OFFSET */
+ {0,105,0,0,1,0,1}, /* FORCE_HOST_REG_CTRL */
+ {0,105,1,0,1,0,1}, /* FORCE_HOST_RADIO_CTRL */
+ {0,105,2,0,1,0,1}, /* FORCE_HOST_FE_CTRL */
+ {0,105,3,0,1,0,1}, /* FORCE_DEC_FILTER_GAIN */
+ {0,106,0,0,1,0,1}, /* MCU_RST_0 */
+ {0,106,1,0,1,0,1}, /* MCU_RST_1 */
+ {0,106,2,0,1,0,0}, /* MCU_SELECT_MUX_0 */
+ {0,106,3,0,1,0,0}, /* MCU_SELECT_MUX_1 */
+ {0,106,4,0,1,1,0}, /* MCU_CORRUPTION_DETECTED_0 */
+ {0,106,5,0,1,1,0}, /* MCU_CORRUPTION_DETECTED_1 */
+ {0,106,6,0,1,0,0}, /* MCU_SELECT_EDGE_0 */
+ {0,106,7,0,1,0,0}, /* MCU_SELECT_EDGE_1 */
+ {0,107,0,0,8,0,1}, /* CHANN_SELECT_RSSI */
+ {0,108,0,0,8,0,32}, /* RSSI_BB_DEFAULT_VALUE */
+ {0,109,0,0,8,0,100}, /* RSSI_DEC_DEFAULT_VALUE */
+ {0,110,0,0,8,0,100}, /* RSSI_CHANN_DEFAULT_VALUE */
+ {0,111,0,0,5,0,7}, /* RSSI_BB_FILTER_ALPHA */
+ {0,112,0,0,5,0,5}, /* RSSI_DEC_FILTER_ALPHA */
+ {0,113,0,0,5,0,8}, /* RSSI_CHANN_FILTER_ALPHA */
+ {0,114,0,0,6,0,0}, /* IQ_MISMATCH_A_AMP_COEFF */
+ {0,115,0,0,6,0,0}, /* IQ_MISMATCH_A_PHI_COEFF */
+ {0,116,0,0,6,0,0}, /* IQ_MISMATCH_B_AMP_COEFF */
+ {0,116,6,0,1,0,0}, /* IQ_MISMATCH_B_SEL_I */
+ {0,117,0,0,6,0,0}, /* IQ_MISMATCH_B_PHI_COEFF */
+ {1,33,0,0,1,0,0}, /* TX_TRIG_IMMEDIATE */
+ {1,33,1,0,1,0,0}, /* TX_TRIG_DELAYED */
+ {1,33,2,0,1,0,0}, /* TX_TRIG_GPS */
+ {1,34,0,0,16,0,0}, /* TX_START_DELAY */
+ {1,36,0,0,4,0,1}, /* TX_FRAME_SYNCH_PEAK1_POS */
+ {1,36,4,0,4,0,2}, /* TX_FRAME_SYNCH_PEAK2_POS */
+ {1,39,0,0,8,0,0}, /* TX_OFFSET_I */
+ {1,40,0,0,8,0,0}, /* TX_OFFSET_Q */
+ {1,41,0,0,1,0,0}, /* TX_MODE */
+ {1,41,1,0,4,0,0}, /* TX_ZERO_PAD */
+ {1,41,5,0,1,0,0}, /* TX_EDGE_SELECT */
+ {1,42,0,0,2,0,0}, /* TX_GAIN */
+ {1,42,2,0,3,0,0}, /* TX_CHIRP_LOW_PASS */
+ {1,42,5,0,2,0,0}, /* TX_FCC_WIDEBAND */
+ {1,42,7,0,1,0,1}, /* TX_SWAP_IQ */
+ {1,43,0,0,1,0,0}, /* MBWSSF_IMPLICIT_HEADER */
+ {1,43,1,0,1,0,0}, /* MBWSSF_IMPLICIT_CRC_EN */
+ {1,43,2,0,3,0,0}, /* MBWSSF_IMPLICIT_CODING_RATE */
+ {1,44,0,0,8,0,0}, /* MBWSSF_IMPLICIT_PAYLOAD_LENGHT */
+ {1,45,0,0,1,0,1}, /* MBWSSF_AGC_FREEZE_ON_DETECT */
+ {1,46,0,0,4,0,1}, /* MBWSSF_FRAME_SYNCH_PEAK1_POS */
+ {1,46,4,0,4,0,2}, /* MBWSSF_FRAME_SYNCH_PEAK2_POS */
+ {1,47,0,0,16,0,10}, /* MBWSSF_PREAMBLE_SYMB1_NB */
+ {1,49,0,0,1,0,1}, /* MBWSSF_FRAME_SYNCH_GAIN */
+ {1,49,1,0,1,0,1}, /* MBWSSF_SYNCH_DETECT_TH */
+ {1,50,0,0,8,0,10}, /* MBWSSF_DETECT_MIN_SINGLE_PEAK */
+ {1,51,0,0,3,0,3}, /* MBWSSF_DETECT_TRIG_SAME_PEAK_NB */
+ {1,52,0,0,8,0,29}, /* MBWSSF_FREQ_TO_TIME_INVERT */
+ {1,53,0,0,6,0,36}, /* MBWSSF_FREQ_TO_TIME_DRIFT */
+ {1,54,0,0,12,0,0}, /* MBWSSF_PPM_CORRECTION */
+ {1,56,0,0,2,0,2}, /* MBWSSF_PAYLOAD_FINE_TIMING_GAIN */
+ {1,56,2,0,2,0,1}, /* MBWSSF_PREAMBLE_FINE_TIMING_GAIN */
+ {1,56,4,0,2,0,0}, /* MBWSSF_TRACKING_INTEGRAL */
+ {1,57,0,0,8,0,0}, /* MBWSSF_ZERO_PAD */
+ {1,58,0,0,2,0,0}, /* MBWSSF_MODEM_BW */
+ {1,58,2,0,1,0,0}, /* MBWSSF_RADIO_SELECT */
+ {1,58,3,0,1,0,1}, /* MBWSSF_RX_CHIRP_INVERT */
+ {1,59,0,0,4,0,8}, /* MBWSSF_LLR_SCALE */
+ {1,59,4,0,2,0,3}, /* MBWSSF_SNR_AVG_CST */
+ {1,59,6,0,1,0,0}, /* MBWSSF_PPM_OFFSET */
+ {1,60,0,0,4,0,7}, /* MBWSSF_RATE_SF */
+ {1,60,4,0,1,0,1}, /* MBWSSF_ONLY_CRC_EN */
+ {1,61,0,0,8,0,255}, /* MBWSSF_MAX_PAYLOAD_LEN */
+ {1,62,0,0,8,1,0}, /* TX_STATUS */
+ {2,33,0,0,8,0,0}, /* SPI_RADIO_A__DATA */
+ {2,34,0,0,8,1,0}, /* SPI_RADIO_A__DATA_READBACK */
+ {2,35,0,0,14,0,0}, /* SPI_RADIO_A__ADDR */
+ {2,37,0,0,1,0,0}, /* SPI_RADIO_A__CS */
+ {2,38,0,0,8,0,0}, /* SPI_RADIO_B__DATA */
+ {2,39,0,0,8,1,0}, /* SPI_RADIO_B__DATA_READBACK */
+ {2,40,0,0,14,0,0}, /* SPI_RADIO_B__ADDR */
+ {2,42,0,0,1,0,0}, /* SPI_RADIO_B__CS */
+ {2,43,0,0,1,0,0}, /* RADIO_A_EN */
+ {2,43,1,0,1,0,0}, /* RADIO_B_EN */
+ {2,43,2,0,1,0,1}, /* RADIO_RST */
+ {2,43,3,0,1,0,0}, /* LNA_A_EN */
+ {2,43,4,0,1,0,0}, /* PA_A_EN */
+ {2,43,5,0,1,0,0}, /* LNA_B_EN */
+ {2,43,6,0,1,0,0}, /* PA_B_EN */
+ {2,44,0,0,2,0,0}, /* PA_GAIN */
+ {2,45,0,0,4,0,2}, /* LNA_A_CTRL_LUT */
+ {2,45,4,0,4,0,4}, /* PA_A_CTRL_LUT */
+ {2,46,0,0,4,0,2}, /* LNA_B_CTRL_LUT */
+ {2,46,4,0,4,0,4}, /* PA_B_CTRL_LUT */
+ {2,47,0,0,5,0,0}, /* CAPTURE_SOURCE */
+ {2,47,5,0,1,0,0}, /* CAPTURE_START */
+ {2,47,6,0,1,0,0}, /* CAPTURE_FORCE_TRIGGER */
+ {2,47,7,0,1,0,0}, /* CAPTURE_WRAP */
+ {2,48,0,0,16,0,0}, /* CAPTURE_PERIOD */
+ {2,50,0,0,3,0,3}, /* LED_REG */
+ {2,51,0,0,8,1,0}, /* MODEM_STATUS */
+ {2,52,0,0,8,1,0}, /* VALID_HEADER_COUNTER_0 */
+ {2,54,0,0,8,1,0}, /* VALID_PACKET_COUNTER_0 */
+ {2,56,0,0,8,1,0}, /* VALID_HEADER_COUNTER_MBWSSF */
+ {2,57,0,0,8,1,0}, /* VALID_HEADER_COUNTER_FSK */
+ {2,58,0,0,8,1,0}, /* VALID_PACKET_COUNTER_MBWSSF */
+ {2,59,0,0,8,1,0}, /* VALID_PACKET_COUNTER_FSK */
+ {2,60,0,0,8,1,0}, /* CHANN_RSSI */
+ {2,61,0,0,8,1,0}, /* BB_RSSI */
+ {2,62,0,0,8,1,0}, /* DEC_RSSI */
+ {2,63,0,0,8,1,0}, /* DBG_MCU_DATA */
+ {2,64,0,0,8,1,0}, /* DBG_ARB_MCU_RAM_DATA */
+ {2,65,0,0,8,1,0}, /* DBG_AGC_MCU_RAM_DATA */
+ {2,66,0,0,16,1,0}, /* NEXT_PACKET_CNT */
+ {2,68,0,0,16,1,0}, /* ADDR_CAPTURE_COUNT */
+ {2,70,0,0,32,1,0}, /* TIMESTAMP */
+ {2,74,0,0,4,1,0}, /* DBG_CHANN0_GAIN */
+ {2,74,4,0,4,1,0}, /* DBG_CHANN1_GAIN */
+ {2,75,0,0,4,1,0}, /* DBG_CHANN2_GAIN */
+ {2,75,4,0,4,1,0}, /* DBG_CHANN3_GAIN */
+ {2,76,0,0,4,1,0}, /* DBG_CHANN4_GAIN */
+ {2,76,4,0,4,1,0}, /* DBG_CHANN5_GAIN */
+ {2,77,0,0,4,1,0}, /* DBG_CHANN6_GAIN */
+ {2,77,4,0,4,1,0}, /* DBG_CHANN7_GAIN */
+ {2,78,0,0,4,1,0}, /* DBG_DEC_FILT_GAIN */
+ {2,79,0,0,3,1,0}, /* SPI_DATA_FIFO_PTR */
+ {2,79,3,0,3,1,0}, /* PACKET_DATA_FIFO_PTR */
+ {2,80,0,0,8,0,0}, /* DBG_ARB_MCU_RAM_ADDR */
+ {2,81,0,0,8,0,0}, /* DBG_AGC_MCU_RAM_ADDR */
+ {2,82,0,0,1,0,0}, /* SPI_MASTER_CHIP_SELECT_POLARITY */
+ {2,82,1,0,1,0,0}, /* SPI_MASTER_CPOL */
+ {2,82,2,0,1,0,0}, /* SPI_MASTER_CPHA */
+ {2,83,0,0,1,0,0}, /* SIG_GEN_ANALYSER_MUX_SEL */
+ {2,84,0,0,1,0,0}, /* SIG_GEN_EN */
+ {2,84,1,0,1,0,0}, /* SIG_ANALYSER_EN */
+ {2,84,2,0,2,0,0}, /* SIG_ANALYSER_AVG_LEN */
+ {2,84,4,0,3,0,0}, /* SIG_ANALYSER_PRECISION */
+ {2,84,7,0,1,1,0}, /* SIG_ANALYSER_VALID_OUT */
+ {2,85,0,0,8,0,0}, /* SIG_GEN_FREQ */
+ {2,86,0,0,8,0,0}, /* SIG_ANALYSER_FREQ */
+ {2,87,0,0,8,1,0}, /* SIG_ANALYSER_I_OUT */
+ {2,88,0,0,8,1,0}, /* SIG_ANALYSER_Q_OUT */
+ {2,89,0,0,1,0,0}, /* GPS_EN */
+ {2,89,1,0,1,0,1}, /* GPS_POL */
+ {2,90,0,1,8,0,0}, /* SW_TEST_REG1 */
+ {2,91,2,1,6,0,0}, /* SW_TEST_REG2 */
+ {2,92,0,1,16,0,0} /* SW_TEST_REG3 */
};
/* -------------------------------------------------------------------------- */
@@ -469,9 +474,9 @@ int lgw_reg_check(FILE *f) {
lgw_reg_r(i, &read_value);
ptr = (read_value == r.dflt) ? ok_msg : notok_msg;
if (r.sign == true)
- fprintf(f, "%s reg: %s read: %d (%x) default: %d (%x)\n", ptr, r.name, read_value, read_value, r.dflt, r.dflt);
+ fprintf(f, "%s reg number %d read: %d (%x) default: %d (%x)\n", ptr, i, read_value, read_value, r.dflt, r.dflt);
else
- fprintf(f, "%s reg: %s read: %u (%x) default: %u (%x)\n", ptr, r.name, read_value, read_value, r.dflt, r.dflt);
+ fprintf(f, "%s reg number %d read: %u (%x) default: %u (%x)\n", ptr, i, read_value, read_value, r.dflt, r.dflt);
}
fprintf(f, "End of register verification\n");
diff --git a/loragw_hal/test/test_loragw_hal.c b/loragw_hal/test/test_loragw_hal.c
index c479e0c..751d00b 100644
--- a/loragw_hal/test/test_loragw_hal.c
+++ b/loragw_hal/test/test_loragw_hal.c
@@ -77,9 +77,11 @@ int main(int argc, char **argv)
int nb_pkt;
uint8_t x;
- int tx_cnt = 0;
+ uint32_t tx_cnt = 0;
+ unsigned long loop_cnt = 0;
int tx_path = 0;
struct lgw_pkt_tx_s txs;
+ uint8_t status_var = 0;
/* configure signal handling */
sigemptyset(&sigact.sa_mask);
@@ -142,6 +144,10 @@ int main(int argc, char **argv)
ifconf.datarate = DR_LORA_SF10;
lgw_rxif_setconf(8, ifconf); /* chain 8: bleeper channel 4, SF10 only */
+
+ /* load the TX payload */
+ strcpy((char *)txbuf, "TX.TEST.LORA.GW.????" );
+
/* set configuration for TX packet */
memset(&txs, 0, sizeof(txs));
txs.freq_hz = 866250000;
@@ -150,13 +156,16 @@ int main(int argc, char **argv)
txs.bandwidth = BW_250KHZ;
txs.datarate = DR_LORA_SF10;
txs.coderate = CR_LORA_4_5;
- txs.payload = "TX.TEST.LORA.GATEWAY";
+ txs.payload = txbuf;
txs.size = 20;
+ txs.rf_chain = 1;
/* connect, configure and start the Lora gateway */
lgw_start();
while ((quit_sig != 1) && (exit_sig != 1)) {
+ loop_cnt++;
+
/* fetch N packets */
nb_pkt = lgw_receive(ARRAY_SIZE(rxpkt), rxpkt);
@@ -225,16 +234,23 @@ int main(int argc, char **argv)
}
/* send a packet every X loop */
- if (tx_cnt >= 32) {
- tx_cnt = 0;
-
- txs.rf_chain = tx_path; /* alternate between path A and B */
- i = lgw_send(txs);
- printf("Packet sent, rf path %d, status %d\n", txs.rf_chain, i);
-
- tx_path = (tx_path+1) % 2;
- } else {
+ if (loop_cnt%16 == 0) {
+ /* 32b counter in the payload, big endian */
+ txbuf[16] = 0xff & (tx_cnt >> 24);
+ txbuf[17] = 0xff & (tx_cnt >> 16);
+ txbuf[18] = 0xff & (tx_cnt >> 8);
+ txbuf[19] = 0xff & tx_cnt;
+ i = lgw_send(txs); /* non-blocking scheduling of TX packet */
+ j = 0;
+ printf("Sending packet #%d, rf path %d, return %d\nstatus -> ", tx_cnt, txs.rf_chain, i);
+ do {
+ ++j;
+ wait_ms(100);
+ lgw_status(TX_STATUS, &status_var); /* get TX status */
+ printf("%d:", status_var);
+ } while ((status_var != TX_EMPTY) && (j < 100));
++tx_cnt;
+ printf("\nTX finished\n");
}
}
@@ -243,7 +259,7 @@ int main(int argc, char **argv)
lgw_stop();
}
- printf("End of test for loragw_hal.c\n");
+ printf("\nEnd of test for loragw_hal.c\n");
return 0;
}
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-23 09:36:44 +0000