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author | Jesse Gilles <jgilles@multitech.com> | 2015-04-06 17:17:40 -0500 |
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committer | Jesse Gilles <jgilles@multitech.com> | 2015-04-06 17:17:40 -0500 |
commit | 061f14802f86bdb41fe7dd0161461f8b8fa054cf (patch) | |
tree | 9327f5550d7927a9bb4f9cc14881635376da1ddc /libloragw/src | |
parent | be5c8ac770bc5b142e2c6a47702d9ac653141371 (diff) | |
download | lora_gateway-061f14802f86bdb41fe7dd0161461f8b8fa054cf.tar.gz lora_gateway-061f14802f86bdb41fe7dd0161461f8b8fa054cf.tar.bz2 lora_gateway-061f14802f86bdb41fe7dd0161461f8b8fa054cf.zip |
add configurable spidev path, fix CS behavior for MTCDT
Diffstat (limited to 'libloragw/src')
-rw-r--r-- | libloragw/src/loragw_spi.native.c | 29 |
1 files changed, 25 insertions, 4 deletions
diff --git a/libloragw/src/loragw_spi.native.c b/libloragw/src/loragw_spi.native.c index f963a59..5036eec 100644 --- a/libloragw/src/loragw_spi.native.c +++ b/libloragw/src/loragw_spi.native.c @@ -53,12 +53,23 @@ Maintainer: Sylvain Miermont #define READ_ACCESS 0x00 #define WRITE_ACCESS 0x80 #define SPI_SPEED 8000000 -//#define SPI_DEV_PATH "/dev/spidev0.0" -#define SPI_DEV_PATH "/dev/spidev32766.0" +// use default device path from library.cfg +char *spi_dev_path = CFG_SPI_DEV; /* path to spi device */ /* -------------------------------------------------------------------------- */ /* --- PUBLIC FUNCTIONS DEFINITION ------------------------------------------ */ +/* set SPI device */ +int lgw_spi_set_path(const char *path) { + if (path) { + spi_dev_path = path; + return LGW_SPI_SUCCESS; + } + else { + return LGW_SPI_ERROR; + } +} + /* SPI initialization and configuration */ int lgw_spi_open(void **spi_target_ptr) { int *spi_device = NULL; @@ -75,9 +86,10 @@ int lgw_spi_open(void **spi_target_ptr) { DEBUG_MSG("ERROR: MALLOC FAIL\n"); return LGW_SPI_ERROR; } - + /* open SPI device */ - dev = open(SPI_DEV_PATH, O_RDWR); + printf("Opening SPI %s\n", spi_dev_path); + dev = open(spi_dev_path, O_RDWR); if (dev < 0) { DEBUG_MSG("SPI port fail to open\n"); return LGW_SPI_ERROR; @@ -95,6 +107,7 @@ int lgw_spi_open(void **spi_target_ptr) { } /* setting SPI max clk (in Hz) */ + printf("Setting SPI speed %d Hz\n", SPI_SPEED); i = SPI_SPEED; a = ioctl(dev, SPI_IOC_WR_MAX_SPEED_HZ, &i); b = ioctl(dev, SPI_IOC_RD_MAX_SPEED_HZ, &i); @@ -183,7 +196,9 @@ int lgw_spi_w(void *spi_target, uint8_t address, uint8_t data) { k.tx_buf = (unsigned long) out_buf; k.len = ARRAY_SIZE(out_buf); k.speed_hz = SPI_SPEED; + /* use default CS behavior k.cs_change = 1; + */ k.bits_per_word = 8; a = ioctl(spi_device, SPI_IOC_MESSAGE(1), &k); @@ -225,7 +240,9 @@ int lgw_spi_r(void *spi_target, uint8_t address, uint8_t *data) { k.tx_buf = (unsigned long) out_buf; k.rx_buf = (unsigned long) in_buf; k.len = ARRAY_SIZE(out_buf); + /* use default CS behavior k.cs_change = 1; + */ a = ioctl(spi_device, SPI_IOC_MESSAGE(1), &k); /* determine return code */ @@ -271,8 +288,10 @@ int lgw_spi_wb(void *spi_target, uint8_t address, uint8_t *data, uint16_t size) memset(&k, 0, sizeof(k)); /* clear k */ k[0].tx_buf = (unsigned long) &command; k[0].len = 1; + /* use default CS behavior k[0].cs_change = 0; k[1].cs_change = 1; + */ for (i=0; size_to_do > 0; ++i) { chunk_size = (size_to_do < LGW_BURST_CHUNK) ? size_to_do : LGW_BURST_CHUNK; offset = i * LGW_BURST_CHUNK; @@ -325,8 +344,10 @@ int lgw_spi_rb(void *spi_target, uint8_t address, uint8_t *data, uint16_t size) memset(&k, 0, sizeof(k)); /* clear k */ k[0].tx_buf = (unsigned long) &command; k[0].len = 1; + /* use default CS behavior k[0].cs_change = 0; k[1].cs_change = 1; + */ for (i=0; size_to_do > 0; ++i) { chunk_size = (size_to_do < LGW_BURST_CHUNK) ? size_to_do : LGW_BURST_CHUNK; offset = i * LGW_BURST_CHUNK; |