add MTAC-LORA board support

4 files changed, 69 insertions, 1 deletions

diff --git a/libloragw/Makefile b/libloragw/Makefile
index b9cad50..bb28e6f 100644
--- a/libloragw/Makefile
+++ b/libloragw/Makefile
@@ -111,6 +111,9 @@ else ifeq ($(CFG_BRD),cisco_470)
 else ifeq ($(CFG_BRD),cisco_780)
   CFG_BRD_MSG := Cisco LoRa 780MHz gateway
   CFG_BRD_OPT := CFG_BRD_CISCO780
+else ifeq ($(CFG_BRD),mtaclora)
+  CFG_BRD_MSG := MultiTech MTAC-LORA 868/900MHz gateway card
+  CFG_BRD_OPT := CFG_BRD_MTACLORA
 else
   $(info [Info] No specific board selected.)
   CFG_BRD_MSG := None
diff --git a/libloragw/inc/loragw_hal.h b/libloragw/inc/loragw_hal.h
index 1516b65..761b4fc 100644
--- a/libloragw/inc/loragw_hal.h
+++ b/libloragw/inc/loragw_hal.h
@@ -66,6 +66,13 @@ Maintainer: Sylvain Miermont
 		#define LGW_RF_TX_LOWFREQ	{ 400000000, 400000000}
 		#define LGW_RF_TX_UPFREQ	{ 510000000, 510000000}
 	#endif
+	/* MTAC-LORA build will support both bands */
+	#if (CFG_BRD_MTACLORA == 1)
+		#define LGW_EU868_FREQ_MIN	863000000
+		#define LGW_EU868_FREQ_MAX	870000000
+		#define LGW_US915_FREQ_MIN	902000000
+		#define LGW_US915_FREQ_MAX	928000000
+	#endif
 #elif (CFG_BAND_868 == 1)
 	#define LGW_RF_RX_LOWFREQ	{ 863000000, 863000000}
 	#define LGW_RF_RX_UPFREQ	{ 870000000, 870000000}
@@ -153,6 +160,9 @@ Maintainer: Sylvain Miermont
 #elif (CFG_BRD_NONE == 1)
 	#define LGW_RF_TX_ENABLE	{ true, true}	/* both radio A and B are usable in TX */
 	#define LGW_RF_CLKOUT		{ true, true}	/* both radios have clkout enabled */
+#elif (CFG_BRD_MTACLORA == 1)
+	#define LGW_RF_TX_ENABLE	{ true, false}	/* radio B TX not connected */
+	#define LGW_RF_CLKOUT		{ true, true}	/* both radios have clkout enabled */
 #endif
 
 /* values available for the 'modulation' parameters */
diff --git a/libloragw/src/loragw_hal.c b/libloragw/src/loragw_hal.c
index 5dbdf45..ecde9d9 100644
--- a/libloragw/src/loragw_hal.c
+++ b/libloragw/src/loragw_hal.c
@@ -128,6 +128,8 @@ F_register(24bit) = F_rf (Hz) / F_step(Hz)
 */
 #elif (CFG_BRD_NONE == 1)
 	#define		RSSI_BOARD_OFFSET		0
+#elif (CFG_BRD_MTACLORA == 1)
+	#define		RSSI_BOARD_OFFSET		166.0 /* Calibrated 2015-02-23 */
 #endif
 
 /* constant arrays defining hardware capability */
@@ -361,6 +363,26 @@ typedef struct {
 		{	3,	3,	13,	14},\
 		{	3,	3,	15,	15},\
 	}; // uncalibrated table, lgw_pkt_tx_s.rf_power selects table index */
+#elif (CFG_BRD_MTACLORA == 1)
+	#define	CUSTOM_TX_POW_TABLE		1
+	const tx_pow_t tx_pow_table[TX_POW_LUT_SIZE] = {\
+		{	0,	3,	 8,	-6},\
+		{	0,	3,	10,	-3},\
+		{	0,	3,	12,	 0},\
+		{	1,	3,	 8,  3},\
+		{	1,	3,	10,	 6},\
+		{	1,	3,	12,	10},\
+		{	1,	3,	13,	11},\
+		{	2,	3,	 9,	12},\
+		{	1,	3,	15,	13},\
+		{	2,	3,	10,	14},\
+		{	2,	3,	11,	16},\
+		{	3,	3,	10,	20},\
+		{	3,	3,	11,	23},\
+		{	3,	3,	12,	24},\
+		{	3,	3,	13,	25},\
+		{	3,	3,	15,	26},\
+	}; /* Calibrated 2015-02-23 */
 #endif
 
 /* Strings for version (and options) identification */
@@ -426,6 +448,8 @@ typedef struct {
 */
 #elif (CFG_BRD_NONE == 1)
 	#define		CFG_BRD_STR		"no_brd"
+#elif (CFG_BRD_MTACLORA == 1)
+	#define		CFG_BRD_STR		"mtac-lora"
 #else
 	#define		CFG_BRD_STR		"brd?"
 #endif
@@ -1063,6 +1087,9 @@ int lgw_start(void) {
 	#elif (CFG_BRD_NANO868 == 1)
 	cal_cmd |= 0x40; /* Bit 6-7: Board type 0: ref, 1: FPGA, 3: board X */
 	cal_time = 5200; /* measured between 5.0 and 5.1 sec */
+	#elif (CFG_BRD_MTACLORA == 1)
+	cal_cmd |= 0x00;
+	cal_time = 3000; /* Recommended by Semtech 2015-02-23 */
 	#else
 	cal_cmd |= 0xC0; /* Bit 6-7: Board type 0: ref, 1: FPGA, 3: board X */
 	cal_time = 4200; /* measured between 4.0 and 4.1 sec */
@@ -1581,6 +1608,15 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) {
 		DEBUG_MSG("ERROR: SELECTED RF_CHAIN IS DISABLED\n");
 		return LGW_HAL_ERROR;
 	}
+/* MTAC-LORA build will suport both bands so check Tx freq differently */
+#if (CFG_BRD_MTACLORA == 1)
+	/* if Tx freq is not in the EU nor the US bands */
+	if ( ! ((pkt_data.freq_hz >= LGW_EU868_FREQ_MIN && pkt_data.freq_hz <= LGW_EU868_FREQ_MAX) ||
+			(pkt_data.freq_hz >= LGW_US915_FREQ_MIN && pkt_data.freq_hz <= LGW_US915_FREQ_MAX)) ) {
+		DEBUG_PRINTF("ERROR: FREQUENCY %d IS OUTSIDE ALLOWED BANDS\n", pkt_data.freq_hz);
+		return LGW_HAL_ERROR;
+	}
+#else
 	if (pkt_data.freq_hz > rf_tx_upfreq[pkt_data.rf_chain]) {
 		DEBUG_PRINTF("ERROR: FREQUENCY %d HIGHER THAN UPPER LIMIT %d OF RF_CHAIN %d\n", pkt_data.freq_hz, rf_tx_upfreq[pkt_data.rf_chain], pkt_data.rf_chain);
 		return LGW_HAL_ERROR;
@@ -1588,6 +1624,7 @@ int lgw_send(struct lgw_pkt_tx_s pkt_data) {
 		DEBUG_PRINTF("ERROR: FREQUENCY %d LOWER THAN LOWER LIMIT %d OF RF_CHAIN %d\n", pkt_data.freq_hz, rf_tx_lowfreq[pkt_data.rf_chain], pkt_data.rf_chain);
 		return LGW_HAL_ERROR;
 	}
+#endif
 	if (!IS_TX_MODE(pkt_data.tx_mode)) {
 		DEBUG_MSG("ERROR: TX_MODE NOT SUPPORTED\n");
 		return LGW_HAL_ERROR;
diff --git a/libloragw/src/loragw_spi.ftdi.c b/libloragw/src/loragw_spi.ftdi.c
index 6f210fe..d57e764 100644
--- a/libloragw/src/loragw_spi.ftdi.c
+++ b/libloragw/src/loragw_spi.ftdi.c
@@ -26,6 +26,8 @@ Maintainer: Sylvain Miermont
 #include <stdlib.h>		/* malloc free */
 #include <string.h>		/* memcpy */
 
+#include <sys/types.h>
+#include <linux/limits.h>
 #include <mpsse.h>
 
 #include "loragw_spi.h"
@@ -52,11 +54,21 @@ Maintainer: Sylvain Miermont
 
 /* parameters for a FT2232H */
 #define VID		0x0403
-#define PID		0x6010
+#ifdef CFG_BRD_MTACLORA
+	#define PID		0x6014	// FTDI232H on MTAC-LORA
+#else
+	#define PID		0x6010
+#endif
+
 
 /* -------------------------------------------------------------------------- */
 /* --- PUBLIC FUNCTIONS DEFINITION ------------------------------------------ */
 
+/* set SPI device -- not implemented for FTDI */
+int lgw_spi_set_path(const char *path) {
+	return LGW_SPI_ERROR;
+}
+
 /* SPI initialization and configuration */
 int lgw_spi_open(void **spi_target_ptr) {
 	struct mpsse_context *mpsse = NULL;
@@ -78,8 +90,14 @@ int lgw_spi_open(void **spi_target_ptr) {
 	
 	/* toggle pin ADBUS5 of the FT2232H */
 	/* On the Semtech reference board, it resets the SX1301 */
+#ifdef CFG_BRD_MTACLORA
+	/* MTAC-LORA boards have the reset active low */
+	a = PinLow(mpsse, GPIOL1);
+	b = PinHigh(mpsse, GPIOL1);
+#else
 	a = PinHigh(mpsse, GPIOL1);
 	b = PinLow(mpsse, GPIOL1);
+#endif
 	if ((a != MPSSE_OK) || (b != MPSSE_OK)) {
 		DEBUG_MSG("ERROR: IMPOSSIBLE TO TOGGLE GPIOL1/ADBUS5\n");
 		return LGW_SPI_ERROR;