--- a/vizzini.c	2013-03-28 16:37:49.863760786 -0500
+++ b/vizzini.c	2013-03-28 16:38:57.353205784 -0500
@@ -95,6 +95,9 @@
 #define READ_URB_RUNNING    0
 #define READ_URB_STOPPED    1
 
+#define UART_PIN_RTS 0x020
+#define UART_GPIO_DIR 0x01b
+
 static int debug;
 
 
@@ -559,6 +562,17 @@
 
         vizzini_set_reg(port, block, UART_FLOW, flow);
         vizzini_set_reg(port, block, UART_GPIO_MODE, gpio_mode);
+        /* if flow control hasn't been turned on, enable RTS for modem-like functionality */
+        if (flow == UART_FLOW_MODE_NONE) {
+                char value;
+                vizzini_get_reg(port, block, UART_GPIO_DIR, &value);
+                value |= UART_PIN_RTS;
+                vizzini_set_reg(port, block, UART_GPIO_DIR, value);
+                vizzini_get_reg(port, block, UART_GPIO_CLR, &value);
+                value |= UART_PIN_RTS;
+                vizzini_set_reg(port, block, UART_GPIO_CLR, value);
+        }
+
 
         if (portdata->trans9) {
                 /* Turn on wide mode if we're 9-bit transparent. */