mts-io: 0.6.1 recipe and pcieh5 patch

2 files changed, 98 insertions, 0 deletions

diff --git a/multitech/recipes/multitech/mts-io/mts-io-0.6.1-pcieh5.patch b/multitech/recipes/multitech/mts-io/mts-io-0.6.1-pcieh5.patch
new file mode 100644
index 0000000..eb347bc
--- /dev/null
+++ b/multitech/recipes/multitech/mts-io/mts-io-0.6.1-pcieh5.patch
@@ -0,0 +1,84 @@
+--- a/mts-io.c	2013-04-22 11:53:16.467357847 -0500
++++ b/mts_io.c	2013-04-22 13:00:45.943391356 -0500
+@@ -349,21 +349,23 @@
+ 		.use_pullup = 0,
+ 		.active_low = 1,
+ 	},
++	// MTPCIE-H5: Wifi and BT enable pins
++	// (was TXD1 and DTR1) (PB17 and PB7 are tied together)
+ 	{
+-		.name = "TXD1",
+-		.pin = AT91_PIN_PB17,
+-		.direction = GPIO_DIR_INPUT,
++		.name = "WLAN_EN",
++		.attr_name = "wlan-enabled",
++		.pin = AT91_PIN_PB7,
++		.direction = GPIO_DIR_OUTPUT,
+ 		.output_value = 0,
+ 		.use_pullup = 0,
+ 	},
+ 	{
+-		.name = "DTR1",
+-		.attr_name = "extserial-dtr",
++		.name = "BT_EN",
++		.attr_name = "bt-enabled",
+ 		.pin = AT91_PIN_PB18,
+-		.direction = GPIO_DIR_INPUT,
++		.direction = GPIO_DIR_OUTPUT,
+ 		.output_value = 0,
+ 		.use_pullup = 0,
+-		.active_low = 1,
+ 	},
+ 	{
+ 		.name = "DCD1",
+@@ -374,6 +376,8 @@
+ 		.use_pullup = 0,
+ 		.active_low = 1,
+ 	},
++	// PCIE-H5 GPIO11 used for WLAN_IRQ
++#if 0
+ 	{
+ 		.name = "GPIO11",
+ 		.attr_name = "gpio11",
+@@ -382,6 +386,7 @@
+ 		.output_value = 1,
+ 		.use_pullup = 1,
+ 	},
++#endif
+ 	{
+ 		.name = "GPIO12",
+ 		.attr_name = "gpio12",
+@@ -1936,13 +1941,13 @@
+ 	&dev_attr_product_id.attr,
+ 	&dev_attr_device_id.attr,
+ 	&dev_attr_hw_version.attr,
+-	&dev_attr_extserial_dtr.attr,
+ 	&dev_attr_extserial_dcd_gpio.attr,
+ 	&dev_attr_rsersrc.attr,
+ 	&dev_attr_radio_reset.attr,
+ 	&dev_attr_eth0_enabled.attr,
+-	&dev_attr_gpio11.attr,
+ 	&dev_attr_gpio12.attr,
++	&dev_attr_bt_enabled.attr,
++	&dev_attr_wlan_enabled.attr,
+ 
+ 	&dev_attr_gpo1.attr,
+ 	&dev_attr_gpo2.attr,
+@@ -2175,7 +2180,7 @@
+ 		return tmp;
+ 	}
+ 
+-	spi_dout_value = 0x00;
++	spi_dout_value = 0xFF;	// 0x00
+ 	spi_writen(spi, &spi_dout_value, 1);
+ 
+ 	spi_dout_dev = spi;
+@@ -2308,6 +2313,8 @@
+ 		mts_product_id = MTCDP_E1_DK_0_0;
+ 		log_info("detected board %s", HW_VERSION_MTCDP_0_0);
+ 	} else if (strncmp(id_eeprom.product_id, PRODUCT_ID_MT100EOCG, strlen(PRODUCT_ID_MT100EOCG)) == 0) {
++		DEVICE_CAPA_SET(id_eeprom.capa, CAPA_WIFI);
++		DEVICE_CAPA_SET(id_eeprom.capa, CAPA_BLUETOOTH);
+ 		attr_group = &mt100eocg_platform_attribute_group;
+ 		gpio_pins = gpio_pins_mt100eocg_0_0;
+ 		mts_product_id = MT100EOCG_0_0;
diff --git a/multitech/recipes/multitech/mts-io_0.6.1.bb b/multitech/recipes/multitech/mts-io_0.6.1.bb
new file mode 100644
index 0000000..ec1a04d
--- /dev/null
+++ b/multitech/recipes/multitech/mts-io_0.6.1.bb
@@ -0,0 +1,14 @@
+require mts-io.inc
+
+SRCREV="v0.6.1"
+
+SRC_URI = " \
+    file://mts-io.init \
+    file://radio-reset-h5 \
+    git://git.multitech.net/cdp-io-controller.git;protocol=git;branch=master;tag=${SRCREV} \
+"
+
+SRC_URI_append_mt100eocg-pcie-dk = " file://mts-io-0.6.1-pcieh5.patch"
+
+LOCAL_PR = "${INC_PR}.17"
+MACHINE_KERNEL_PR_append = "${LOCAL_PR}"