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<title>corecdp.git/multitech/recipes/at91bootstrap/at91bootstrap-2.13, branch 2.2.2</title>
<subtitle>Multi-Tech CoreCDP 2 Repository</subtitle>
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<title>at91bootstrap: use slow slew rate for SDRAM</title>
<updated>2011-11-03T21:18:56+00:00</updated>
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<name>Jesse Gilles</name>
<email>jgilles@multitech.com</email>
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<published>2011-11-03T21:18:56+00:00</published>
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<entry>
<title>rename mt100ecdp to mt100eocg</title>
<updated>2011-09-14T16:25:58+00:00</updated>
<author>
<name>Jesse Gilles</name>
<email>jgilles@multitech.com</email>
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<published>2011-09-14T16:25:58+00:00</published>
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<entry>
<title>rename mtcdp-embedded to mt100ecdp</title>
<updated>2011-08-19T15:21:42+00:00</updated>
<author>
<name>Jesse Gilles</name>
<email>jgilles@multitech.com</email>
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<published>2011-08-19T15:21:42+00:00</published>
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<entry>
<title>at91bootstrap 2.13: add toshiba nand id</title>
<updated>2011-07-28T21:07:54+00:00</updated>
<author>
<name>Jesse Gilles</name>
<email>jgilles@multitech.com</email>
</author>
<published>2011-07-28T21:07:54+00:00</published>
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<entry>
<title>initial work on multitech bitbake layer for CoreCDP</title>
<updated>2011-06-28T20:16:57+00:00</updated>
<author>
<name>Jesse Gilles</name>
<email>jgilles@multitech.com</email>
</author>
<published>2011-06-28T20:16:57+00:00</published>
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