diff options
| -rw-r--r-- | io-module/mts_io.c | 19 |
1 files changed, 14 insertions, 5 deletions
diff --git a/io-module/mts_io.c b/io-module/mts_io.c index c9a2c4b..3fc59d9 100644 --- a/io-module/mts_io.c +++ b/io-module/mts_io.c @@ -1549,6 +1549,7 @@ static ssize_t mts_attr_show_adc(struct device *dev, { int offset; u32 value; + u32 chan_mask; if (!DEVICE_CAPA(id_eeprom.capa, CAPA_ADC)) { log_debug("ADC not available"); @@ -1557,22 +1558,32 @@ static ssize_t mts_attr_show_adc(struct device *dev, if (!strcmp(attr->attr.name, "adc0")) { offset = ADC_CDR0_OFFSET; + chan_mask = 0x01; } else if (!strcmp(attr->attr.name, "adc1")) { offset = ADC_CDR1_OFFSET; + chan_mask = 0x02; } else if (!strcmp(attr->attr.name, "adc2")) { offset = ADC_CDR2_OFFSET; + chan_mask = 0x04; } else if (!strcmp(attr->attr.name, "adc3")) { offset = ADC_CDR3_OFFSET; + chan_mask = 0x08; } else { log_notice("adc attr does not exist"); return -ENOENT; } + // disable all channels and enable the one we want + writel(0x0F, adc_base + ADC_CHDR_OFFSET); + writel(chan_mask, adc_base + ADC_CHER_OFFSET); + ADC_CONVERT_START(adc_base); + // wait for conversion to complete (EOC bit set) value = 0; - while (value != 0x0F) { - value = readl(adc_base + ADC_SR_OFFSET) & 0x0F; + while (value != chan_mask) { + value = readl(adc_base + ADC_SR_OFFSET) & chan_mask; + log_debug("ADC_SR EOC [%X]", value); } return sprintf(buf, "%lu\n", (unsigned long) readl(adc_base + offset)); @@ -2487,9 +2498,7 @@ static int __init mts_io_init(void) ADC_CONVERT_RESET(adc_base); writel(ADC_MODE_DEFAULT, adc_base + ADC_MR_OFFSET); writel(0x000F0F0F, adc_base + ADC_IDR_OFFSET); - if (DEVICE_CAPA(id_eeprom.capa, CAPA_ADC)) { - writel(0x0F, adc_base + ADC_CHER_OFFSET); - } else { + if (!DEVICE_CAPA(id_eeprom.capa, CAPA_ADC)) { writel(0x0F, adc_base + ADC_CHDR_OFFSET); } |